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11:51:44 <cbridge_> <Zarutian_HTC> 
ACTION has been drawing up his fcpu16 in logisim evolution

11:59:41 <cbridge_> <tangentstorm> cool, Zarutian_HTC :) ... how do you like it?
12:01:48 <cbridge_> <Zarutian_HTC> pretty good but lacks a bit of polish like having duplicate in the right click menu when clicked on a component/selection
12:07:24 <cbridge_> <tangentstorm> i've played with verilog but i've never tried to design a circuit visually like that. 
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13:28:29 <cbridge_> <Zarutian_HTC> never liked verilog or vhdl for mostly syntax reasons
13:29:33 <cbridge_> <Zarutian_HTC> did some playing around with extended BLIFF
16:04:51 <cbridge_> <dave0> maw
16:19:18 <cbridge_> <lispmacs[work]> wam!
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16:31:45 <cbridge_> <crc> good evening
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16:32:37 <cbridge_> <eris[m]1> hallo!
16:33:00 <cbridge_> <eris[m]1> had a lovely night on the fediverse, got called a war criminal bcos i like forth
16:33:11 <cbridge_> <eris[m]1> what a place ay
16:40:04 <cbridge_> <lispmacs[work]> yeah, I think that happened to me once. told them it was purely circumstancial evidence
16:41:25 <cbridge_> <lispmacs[work]> just being psycho enough to like Forth doesn't /actually/ make you a war criminal
16:41:45 <cbridge_> <lispmacs[work]> anyway, you have to get captured first
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18:15:12 <cbridge_> <eris[m]1> like, the activitypub network
18:15:15 <cbridge_> <eris[m]1> mastodon and such
19:21:10 <cbridge_> <dave0> re maw
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