00:00:00 --- log: started forth/21.02.05 00:05:30 --- join: hosewiejacke joined #forth 00:15:02 --- join: xek joined #forth 00:18:02 --- quit: Zarutian_HTC (Ping timeout: 276 seconds) 00:19:12 --- join: Zarutian_HTC joined #forth 00:27:52 --- quit: dave0 (Ping timeout: 258 seconds) 00:29:26 --- join: dave0 joined #forth 01:12:07 --- quit: proteus-guy (Ping timeout: 240 seconds) 01:23:38 --- quit: APic (Ping timeout: 240 seconds) 01:26:56 --- join: neuro_sys_ joined #forth 01:27:01 --- quit: neuro_sys (Quit: -) 01:27:02 --- nick: neuro_sys_ -> neuro_sys 01:27:03 --- quit: neuro_sys (Changing host) 01:27:03 --- join: neuro_sys joined #forth 01:33:11 --- join: APic joined #forth 02:00:03 --- join: neuro_sys_ joined #forth 02:00:47 --- quit: neuro_sys (Ping timeout: 240 seconds) 02:00:47 --- nick: neuro_sys_ -> neuro_sys 02:00:47 --- quit: neuro_sys (Changing host) 02:00:47 --- join: neuro_sys joined #forth 02:18:35 --- quit: hosewiejacke (Quit: Leaving) 03:41:52 --- join: gravicappa joined #forth 05:49:27 --- quit: Zarutian_HTC (Read error: Connection reset by peer) 05:49:45 --- join: Zarutian_HTC joined #forth 05:51:18 --- join: Zarutian_HTC1 joined #forth 05:53:58 --- quit: Zarutian_HTC (Ping timeout: 240 seconds) 06:23:00 --- nick: Zarutian_HTC1 -> Zarutian_HTC 08:05:46 --- quit: dave0 (Quit: dave's not here) 08:32:19 --- quit: xek (Ping timeout: 256 seconds) 09:53:19 --- join: Zarutian_HTC1 joined #forth 09:53:19 --- quit: Zarutian_HTC (Read error: Connection reset by peer) 09:58:28 --- quit: lispmacs (Read error: Connection reset by peer) 10:36:18 --- quit: gravicappa (Ping timeout: 240 seconds) 11:44:19 --- join: merzbird joined #forth 12:16:55 --- quit: Zarutian_HTC1 (Read error: Connection reset by peer) 12:19:11 --- join: Zarutian_HTC joined #forth 12:28:03 --- quit: inode (Quit: ) 12:43:13 --- join: X-Scale` joined #forth 12:44:33 --- quit: X-Scale (Ping timeout: 256 seconds) 12:44:33 --- nick: X-Scale` -> X-Scale 12:54:19 --- quit: zolk3ri (Remote host closed the connection) 13:11:00 folks here have dealt with various designs of MCUs, no? 13:12:39 anyone come across one with memory address space mapped io and bankswitched memory address space with the following twist 13:14:26 one bank is where the control registers for the bank switching is located. One with two profiles that you can switch between as active 13:14:58 one profile gets switched to automatically on interrupt 13:15:18 anyone seen such a setup? 13:15:45 how do you switch banks if you write the register that deselects the bank? wont you be stuck then? 13:16:08 allows for process seperation without using page tables 13:16:46 more than one bank slot in the address space 13:17:35 and the returnFromInterrupt switches back between the two profiles 13:17:44 so at least one fixed bank? 13:19:01 no fixed bank but a power-on-defaults setup in the active profile 13:22:34 basically nearly fully virtualizable if one of the 'bank' causes interrupt on access 13:23:25 saw this design in some old 6502 computer used for industrial automation 13:25:58 the out pin from the 6502 for external interrupts enable was used as the bank profile active selector 13:26:39 neat 13:28:58 the thing had more memory than fit into the limited 64K address space, but it did implement preemptive noncooperative task switching 13:29:50 ya bank switching is pretty common on 6502 stuff 13:29:58 and this meant that many tasks could be running but each thinking it was the only thing running 13:30:27 ah I see what you mean. ot just a bank for interrupts but a number of banks and you go to the next one every time the interrupt fires? 13:31:24 yebb, common but not in this way where the banks selection setup, the profiles, was in one bank that could be denied to other tasks 13:31:52 a more concrete example: 13:32:49 the 64K address space is split up into 16 bank slots 13:33:50 each slot can select between 256 banks 13:35:05 one of these banks provides access to two 16 bank selection profiles 13:35:48 that is the registers saying which bank slot has which bank in it 13:36:49 one of them is always active, which one depends on the external interrupt enable pin from the 6502 13:38:05 the first profile that is active at power-on has default setup 13:39:11 meaning that the banks with the rom, the io, and the bank selection profiles are accessible 13:39:45 what about the other 3 banks? 16k is kind of limited for code+data. one code bank and at least two data banks is nice 13:40:29 255 banks each 4K in size 13:41:39 but there is only 16 bank slots per profile. 13:42:28 meaning each can select one bank from the the 255 available 13:42:53 so then how does it change the slots while it's running? 13:44:05 by writing into either of the 'profile' in the bank that keeps the two profiles 13:45:12 it switches from profile 0 to 1 via rfi instr (the external interrupt enable) and back again when an interrupt occurs 13:49:40 so it cant switch the slot assignment until the interrupt fires again? 13:51:13 this memory bank unit made it possible to do something akin to kernel/user mode and virtualization with very little hardware 13:52:15 --- join: xek joined #forth 13:52:18 it can only change the slot assignments iff the bank where the two profiles is mapped in 13:52:35 so, yesþ 13:52:45 s/þ/./ 13:54:02 one of the selectable banks just caused interrupt when accessed 13:54:52 so it was fully virtualizable 13:58:25 I was pretty astonished how little hardware wise it needed for its implementation 13:59:36 but you could wedge yourself into a corner if neither of the profiles had the profiles bank mapped 14:01:37 how was the power on defaults implemented? both profiles lived in a small sram whose address line also fed into a small rom 14:02:30 the rom output got xored into the data lines of the sram 14:03:07 so when the sram was zeroed on power up you got the default values 14:04:37 so guessing the clock speed was kind of low 14:04:57 when writen to the sram actually contained the default value xored with the intended value 14:05:29 around one megahertz or so 14:06:03 probably enough depending on what youre doing 14:06:28 delays start stacking up really quickly so putting a XOR or anything else drops your max clock really quickly 14:07:58 it was a fast enough xor chip 14:08:39 right you can add all kinds of delays if youre running at 1mhz 14:09:57 this thing was designed and built in the 1980's or so for industrial machine control applications 14:11:39 I just found it neat that you could do task/process seperation without the big or complicated mmu 15:20:39 Zarutian_HTC: what is the model of this system? 15:21:07 --- quit: xek (Ping timeout: 240 seconds) 16:05:44 --- quit: Zarutian_HTC (Read error: Connection reset by peer) 16:05:44 --- join: Zarutian_HTC1 joined #forth 17:49:44 --- join: dave0 joined #forth 18:19:15 --- join: boru` joined #forth 18:19:17 --- quit: boru (Disconnected by services) 18:19:20 --- nick: boru` -> boru 18:55:39 --- quit: dave0 (Quit: dave's not here) 20:03:36 --- join: jedb_ joined #forth 20:04:19 --- quit: jedb (Read error: Connection reset by peer) 20:15:27 --- quit: sts-q (Ping timeout: 240 seconds) 20:22:32 --- nick: jedb_ -> jedb