00:00:00 --- log: started forth/15.01.17
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04:00:46 <pgomes> Hi
04:00:59 <pgomes> Why are the URLs in the topic message not available ?
04:48:40 <proteusguy> isforth domain has expired but is hopefully being renewed soon. the rest should work.
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06:09:39 <pgomes> forthfreak.net shows 'vm 20 ' only
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11:21:09 <Bahman> pgomes: Any specific material you're looking for? I might help.
11:27:26 <pgomes> no just wanted to browse
11:27:34 <pgomes> know forth but did not know those sites
11:27:53 <pgomes> thanks anyway :P
11:29:58 <Bahman> :-)
11:33:39 <mark4_> what sites? :)
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11:51:16 <pgomes> isforth.com | forthfreak.net
11:51:48 <pgomes> BTW is there a good forth that runs and metacompiles in a cubieboard (ARM7) that you know of ?
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13:41:22 <I440r> isforth.com is not active right now :(
13:41:36 <I440r> i need to pay the domain reg but im working. might be able to do it in a week or 2
13:42:17 <I440r> pgomes, actually i have a version of isforth that runs on ARM and I am just now putting the finishing touches on the thumb2 version of it
13:42:39 <I440r> thers no assembler for it yet so no metacompiler but i already have a spreadsheet I have started for the instruction encodings
13:43:11 <pgomes> I don't have the cubie yet
13:43:31 <I440r> both my arm forths run on my beagleboard xm
13:43:33 <pgomes> will get it from amazon next week
13:43:46 <I440r> but NOT if you install a debian based distro
13:43:51 <I440r> tho that can be fixed
13:43:53 <pgomes> why?
13:43:57 <pgomes> is is OS dependent?
13:44:04 <I440r> no
13:44:24 <I440r> its down to stupidity of debian devs that i have refused to fix in my code
13:44:30 <I440r> though... i COULD lol
13:45:17 <pgomes> what is wromg?
13:45:41 <I440r> i just dont like duct-taping my code for other peoples breakages
13:45:53 <I440r> 1: debian MOVES some of the terminfo files into /lib/terminfo
13:46:11 <I440r> having them there is fine, MOVING them there from /usr/share/terminfo/* is utter fucking moronic stupidity
13:46:49 <I440r> my terminfo parser does not go HUNTING for the terminfo files when the FHS states where they SHOULD BE
13:46:56 <I440r> i look where they are supposed to be and no further
13:47:27 <I440r> second problem.  while debian distros are PAX aware, their binutils does not create elf executables with a pax header
13:47:35 <I440r> my fsave assumes the pax header is there. 
13:47:54 <I440r> fix 1:  cp -rv /lib/terminfo/* /usr/share/terminfo/
13:48:13 <I440r> fix 2: modify fsave to look at the elf headers to see if there is a pax header
13:49:17 <I440r> the forth runs but unless fsave is fixed you would not be able to create a functional executable when you fsave
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13:50:20 <I440r> i put gentoo on my beagleboard, all my systems run gentoo :)
13:51:07 <I440r> but i dont run out of flash, my boot is on the flash card but / is on an external usb drive
13:51:33 <I440r> btw i have a GPIO module i wrote for someone with a cubie, i did not hear back from him that it worked
13:52:38 <I440r> what distro were you planning on using on it :))
13:53:02 <I440r> if you have the patience i always recommend gentoo but only if you are smart with the USE flags
13:56:51 <pgomes> don't know yet ... what do you recommend ?
13:58:58 <I440r> if you have the patience... gentoo :)
13:59:20 <I440r> but... i DO recommend an external USB drive or if you have sata...
13:59:29 <tangentstorm> is isforth an ansi standard forth, I440r ?
13:59:38 <I440r> i do not recommend running any full blown system off of a flash device
14:00:11 <I440r> tangentstorm, im not FAR of being an ans standard forth, there are not that many differences but i am rabidly ANTI ans
14:00:33 <tangentstorm> do you see the irony there? :)
14:00:42 <I440r> no!!!!!!!!!
14:00:45 <I440r> lol
14:00:45 * tangentstorm knows it's probably not really irony.
14:00:54 <tangentstorm> :)
14:01:19 <I440r> i do not have postpone defined.  i use compile and [compile] because postpone is insanity
14:01:28 <I440r> i have NOT defined. i will never define "invert"
14:01:39 <I440r> i call it a VAR not a "value"
14:01:52 <I440r> i have variable, constant, var, const.  they are all different
14:01:58 <I440r> variable and constant are as expect.
14:02:06 <I440r> a var is also a constant but your allowed to modify it
14:02:14 <I440r> a const is a state smart immediate word
14:02:17 <I440r> 10 const foo
14:02:20 <I440r> foo .  10
14:02:26 <I440r> : blahy... foo ... ;
14:02:58 <I440r> in the blah definituion foo will execute during compilation because foo is immediate. its also state smart. because were in compile mode it will compile itself as a literal
14:04:15 <I440r> i dont like the word name "value" because it is (like MANY ans words) totally undescriptive of its purpose
14:04:44 <I440r> an address has a value. a number has a value etc etc
14:05:00 <I440r> the name VAR is descriptive in that it suggests the item is a variable
14:05:07 <I440r> 10 var foo  
14:05:11 <I440r> also. i did not define "TO"
14:05:27 <I440r> again because its TOTALLY un fucking descriptive of what it is doing
14:05:40 <I440r> the word is called !> and is pronounced STORE TO
14:05:42 <I440r> 100 !> foo
14:05:48 <I440r> 50 +!> foo
14:05:50 <I440r> incr> foo
14:05:52 <I440r> decr> foo
14:09:59 <I440r> there are other subtle differences like.. at all times i know exactly what is at the top of both my parameter stack and my return stack
14:10:18 <I440r> in an ans forth you can NOT expect a words return address to be at the top of the return stack on entry into the word
14:10:23 <I440r> : foo r>drop do stuff ;
14:10:32 <I440r> not guaranteed to work in an ans forth
14:11:08 <I440r> : asm> r> <a> >r !> <a> .. .. .  ;  <-- my assembler delay line that i use in many assemblers i write
14:11:53 <I440r>   mov r0, # 5  <-- allows for this instead of 5 # r0, mov which i hate
14:12:06 <I440r> <--- heretic
14:12:46 <Zarutian> I440r: AT&T style or Bell Labs style?
14:12:54 <Zarutian> (gasm or nasm style)
14:13:07 <I440r> never at&t
14:13:52 <Zarutian> so mov r0, # 5 is moving the literal number five into register zero?
14:13:54 <I440r> i do not have an x86 assembler yet, i have an 8051 assembler (slightly buggy but i fixed the bugs once but they seem to have been missplaced) and a full blown AVR assembler
14:14:06 <I440r> supports ALL avr devices
14:14:18 <I440r> yes  loads literal 5 into register r0
14:14:35 <I440r>  mov eax, # 10    <---
14:14:51 <I440r>  mov eax, 10  <-- thou i think i would do it this way
14:15:14 <I440r> and  mov eax, [ variable >body ]
14:15:35 <I440r> or mov eax, ' variable >body  <-- points eax at body of var as apposed to fetching the contents of the body as above
14:15:46 <I440r> no need for # cluttering things up
14:15:57 <I440r> its always an immediate unless you use [ ]  
14:16:08 <I440r> that sort of thing. i just didnt implement the assembler yet for x86
14:17:11 <I440r> the x86 version of isforth is assembled with nasm
14:17:29 <I440r> when i write my assembler extension i dont want to have to mess with the existing sources too much
14:17:38 <Zarutian> perhaps I am wierd but I prefer what eForth does. Defening a few primitives and the code is mostly colon definitions.
14:18:14 <I440r> Zarutian, thats GOOD if speed is not an issue and sometimes a colon definition is larger which is bad in an embedded situation
14:18:34 <I440r> tho for most of the primitives in my thumb2 version of isforth its very close lol
14:18:57 <I440r> but while isforth x86 is direct threaded the arm versions are both subroutine threaded
14:19:41 <Zarutian> but then again I hate idotic cache structures on chip. Just gimme small and fast SRAM that I can address directly and a good DMA engine to fetch from main DRAM memory.
14:20:10 <I440r> people who write code optimized for a chips instruction and data chache are just being stupid
14:20:29 <I440r> using dma can be problematical too lol
14:20:46 <I440r> tho i think i would like to implement cmove and cmove> using dma
14:21:11 <I440r> on the GBA using the dma engine is SLOW.  in that the fastest way is to do successive
14:21:24 <I440r> ldmia and stmia instructions
14:21:52 <I440r> i.e. loat the next 32 bytes into r0, r1, r2, r3. store r0, r1, r2, r3 into the next 32 bytes of the destination
14:22:02 <I440r> if you can use r0-r7 that makes it all the faster
14:22:24 <I440r> gba devs never use the dma engine except for fetching audio samples to be played
14:22:38 <Zarutian> basically what I mean is having small SRAM where the code and data you are currently working on is held. Then use the DMA thing to evict and fetch whole pages (256-4096 bytes)
14:23:14 <I440r> you have specific hardware you will be doing this on?
14:23:30 <Zarutian> nope
14:23:55 <Zarutian> just feel like some assumptions that some hardware designers did were never properly understood
14:24:30 <I440r> by the hardware devs or by the software devs after? lol
14:24:38 <Zarutian> by both
14:25:29 <I440r> i think the best hardware devs are ones who are also skilled in software development. they see the problem from both sides of the coin
14:25:44 <I440r> i am not a hardware guy in any way shape or form :)
14:25:59 <Zarutian> "we need to pipeline the cpu to get more speed" <- sorry but your instruction code is shitty then and you only get more throughput
14:27:32 <Zarutian> "we need complex caches because the memory we are fetching code and data are so much slower!" <- live within in your memory budget with onboard SRAM and keep other stuff swapped out to much bigger DRAM.
14:28:33 <I440r> if you have <--->  this much FAST ram and <------------> this much slow ram
14:28:51 <I440r> devs are going to cram as much as they can into the faster area even if they dont need to
14:28:57 <Zarutian> "we need branch prediction because otherwise there would be too long pipeline stalls" <- see #1 on pipelines and branch heavy code such as Forth will wreck your branch prediction tables.
14:29:16 <I440r> lol forth DOES wreck them
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14:30:53 <Zarutian> one of my low priority hobbies is writing torture code meant to run on shared hardware (on shell hosts, VM cloud hosts and such) that does nothing but wrecking branch prediction tables, pipeline fillages and caches.
14:31:28 <Zarutian> basically be the worst case scenario in every instance.
14:32:27 <Zarutian> add frequent TLB flushes to that list too.
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14:34:43 <I440r> lol
14:35:41 <Zarutian> heck, what I pine for is basically something like Novix 4016 core+128K sram pairs layed out as array on chip using something like GreenArrays ports to communicate with four neighbours in the cardinal directions.
14:36:59 <Zarutian> I bet a GreenArray chip or two could easily simulate x86 bytecode by having one computer decode the instructions, while another fetches data from memory and so on.
14:37:53 <I440r> would it be as fast as my 6 core lga2011 running at 4.3ghz?
14:37:58 <I440r> used to run at 4.7 lol
14:38:45 <Zarutian> depends
14:38:58 <Zarutian> maybe it would even be faster.
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16:27:40 <I440r> forgot i had this one loaded lol
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19:21:51 <I440r> challenge: reverse the order of the first N parameters on the stack. make N a parameter (not included in the reversal :)
19:23:06 <I440r> guess the only real way to do it would be to allocate N cells. move all the data into that buffer. then write the buffer back to the stack in reverse and then free the buffer
19:23:37 <I440r> either that or invent a word to rotate out the Nth item on the stack... not fun lol
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