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05:12:49 <KipIngram> Good morning.
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05:36:15 <gogonkt> morning ~~
06:15:53 <KipIngram> Deformative: I want to suggest a way for you to compact your code.
06:16:20 <KipIngram> You're using 30 bits of your 32-bit cells for opcodes (when the cell contains opcodes).  That leaves you the two bits left over.
06:16:27 <KipIngram> Let them have meaning like so:
06:16:43 <KipIngram> 00: Bits [29:0] contain opcodes.
06:17:17 <KipIngram> 11: Bits [29:0] specify a fully conditionalized slot address (like we discussed yesterday)
06:17:52 <KipIngram> 01: Bits [29:0] specify two 15-bit *cell* addresses, to be used for subroutine calls.  No conditional stuff.
06:18:55 <KipIngram> 10: Reserved for now.  I have ideas but nothing profound.
06:19:29 <KipIngram> This lets you do everything we talked about when you need to but also gives you the ability to pack two standard colon definition calls into a cell.
06:19:41 <KipIngram> Provided the target words start on a cell boundary.
06:19:53 <KipIngram> Your return stack would of course be a full 32-bit entity that could return to any slot.
06:20:50 <ASau`> There're enough reasons to build cell-addressing machine.
06:20:52 <KipIngram> Your 15-bit addresses in case 01 are cell addresses, so that gives you short address access to 128kB of code space in that mode.  That's a lot in a Forth system.
06:21:17 <ASau`> (If you're targeting Forth.)
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08:38:01 <Deformative> KipIngram: Yeah, I was thinking something like that, but only if I cannot find a way to make all of these things implicit.
08:45:12 <Deformative> Hmm, it looks like my board only has sdram. D:
08:45:14 <Deformative> No sdram.
08:45:28 <Deformative> Well, I suppose my clock is not every high anyway.
08:47:42 <Deformative> ..maybe there is sram.
08:47:50 <Deformative> I just cannot find the datasheet for it.
08:50:46 <Deformative> Nope, looks like no sram.
08:51:10 <Deformative> Perhaps I will buy a small ship of sram.
09:13:52 <KipIngram> Or just interface the sdram.
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09:31:45 <alex4nder> hey
09:37:43 <Deformative> KipIngram: Yeah.
09:38:21 <Deformative> It would be fun to put sdram on a couple of the expansion pins, but I will probably just use the sdram. 
09:38:27 <Deformative> Erm.
09:38:30 <Deformative> fun to put sram
09:38:32 <Deformative> Key alex4nder.
09:39:25 <alex4nder> sup Deformative 
09:40:01 <Deformative> Sitting around waiting to take my exams so can get home to play with my fpga.
09:40:21 <Deformative> You?
09:40:51 <alex4nder> thinking about building a PCB layout tool
09:41:27 <Deformative> Cool.
09:55:40 <Deformative> Well, I am going to try to get some studying done.
09:55:47 <Deformative> Talk to everyone later. o/
10:15:49 <alex4nder> late
10:20:15 <gogonkt> night
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10:51:37 <Deformative> KipIngram: I can only address one 16-bit word at a time on my sdram.
10:51:47 <Deformative> That kills my idea of 32 bit on this fpga...
10:52:10 <Deformative> Unless I get some more ram on the expansion headers or something I suppose.
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10:54:03 <Deformative> Well, I have 4 banks, but I think I can only access one per cycle.
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11:18:13 <KipIngram> How much block RAM is inside the FPGA?
11:25:38 <Deformative> 56 M9K Embedded Memory Blocks
11:25:44 <Deformative> I have no idea what that means though.
11:26:08 <KipIngram> I think that is 9kbits * 56.
11:26:50 <Deformative> Hmm....
11:28:13 <Deformative> 16kb 32 bit words.
11:28:28 <Deformative> ERm
11:28:30 <Deformative> -b
11:32:14 <Deformative> Not a whole lot..
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11:49:59 <KipIngram> Still enough for a fairly substantial Forth.
11:50:03 <KipIngram> Dual ported?
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11:51:22 <Deformative> Doesn't say.
11:51:59 <Deformative> I could build a daughter board with some ram on it for pretty cheap I think.
11:52:42 <Deformative> Even if I just put an additional 4m sdram on there.
11:54:06 <Deformative> What is a pll?
11:55:40 <alex4nder> phased locked loop
11:55:56 <alex4nder> er phase
11:56:27 <Deformative> Oh, cool.
11:56:37 <Deformative> So that's how I can get up to 100 mhz.
12:25:18 <KipIngram> Yes, you can do that inside the chip generally.
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14:35:53 <saper> "Challenging the return address or GOTO reinvented"
14:41:51 * Deformative shrugs.
14:42:23 <Deformative> KipIngram: How would sdram work for my cpu, doesn't it require multiple cycles to fetch data?
14:56:05 <KipIngram> Well, yes, that's true; you'd have to use a faster clock for the SDRAM.  
14:56:14 <KipIngram> How many PLL's does your chip have?
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15:12:50 <Deformative> Yeah Kip, I will probably need to run my sdram faster like you said.
15:13:44 <Deformative> Actually no, I will just extremely limit the memory available an ddo it all in chip.
15:13:49 <Deformative> :/
15:14:26 <Deformative> Hopefully I have enough LEs.
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16:11:35 <KipIngram> Deformative: I'm trying to work out a clean, simple way to implement your "keep the cell at the return address prefetched" notion.  It's kind of involved.
16:13:21 <KipIngram> The primary complexity is that the hardware can only do the prefetch when the memory isn't busy with some other operation.
16:14:38 <KipIngram> Take the case of an empty subroutine, for example.
16:17:32 <KipIngram> Well, I won't go through that right now; I'm still working out the exact flow.  But anyway, in an empty subroutine by the time I get the return address settled into the top of return stack I'm already "on my way back," more or less.
16:17:37 <KipIngram> No time to do the prefetch.
16:18:07 <KipIngram> So if I can't rely on the prefetched data always being there then I have to keep up with when I can and when I can't, and that gets messy.
16:18:21 <KipIngram> I haven't given up - the answer may be simple.
16:20:03 <KipIngram> Going to dinner - will be back later.
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18:06:39 <Deformative> Hey all.
18:07:16 <crc> hi
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18:36:56 <Deformative> Wow, compilation is so slow.
18:37:05 <Deformative> (quartus verilog)
19:21:00 <KipIngram> Yup - FPGA development environments typically *crawl*.
19:23:58 <Deformative> Yeah, it ran faster on the computers I used in the lab though.
19:24:02 <Deformative> And those were old P-4s.
19:24:21 <Deformative> I think it is because I have a newer version of quartus, so there are more optimizations.
19:24:23 <Deformative> But who knows.
19:28:00 <Deformative> My fpga is really not designed to support this 32 bit word idea of mine at all.
19:29:39 <Deformative> I am hoping that since the rest of the cpu is so minimal, I will still manage to make it fit.
19:32:51 <Deformative> Hmm, I can use my sdram for vga.
19:32:53 <Deformative> Neat.
19:41:30 <KipIngram> Not designed to support... You mean just because of logic capacity?
19:43:42 <Deformative> Yeah, I am worried about running out of components.
19:43:46 <Deformative> I think it will be a tight fit.
19:44:22 <Deformative> I don't know how the multiplier blocks work, I haven't gotten there yet.
19:44:26 <Deformative> Says I have 54 blocks.
19:44:40 <Deformative> I think that is enough for 32 bit multiplication, but I have no idea.
19:44:51 <Deformative> 56 rather.
19:45:17 <Deformative> And I have no idea how many LEs division will take.
19:47:10 <KipIngram> I'm not trying to do division at all in hardware.
19:47:40 <Deformative> I want hardware division and multiplication.
19:47:45 <Deformative> Those are rather useful.
19:48:12 <Deformative> Since those have the potential of being bottlenecks in the software.
20:07:06 <Deformative> It's funny, someone I knew had to implement bigint multiplication, he decided to use binary search to do it.
20:07:08 <Deformative> I thought it was clever.
20:07:42 <Deformative> Erm, bigint division.
20:07:48 <Deformative> Not multiplication.
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20:41:20 <KipIngram> I don't know if I've ever studied division hardware.
20:47:00 <KipIngram> I know binary search is used in taking square roots - maybe a modification of that scheme can do general division.
20:50:02 <Deformative> Well, he had multiplication implemented.
20:50:47 <Deformative> So he binary searched to find which bigint * denominator = numerator
20:52:48 <KipIngram> How did he handle the remainder?  Chances are that wasn't an exact equality.
20:58:16 <Deformative> Well, he binary searched until the range was 1, then he knew it was the lower bound.
21:01:22 <KipIngram> Interesting.  Just off the cuff I think I'd lean toward a fairly straightforward synthetic division process.
21:02:16 <Deformative> Hm.
21:02:29 <KipIngram> I can't remember exactly what I was doing, but sometime in the last year or so I had to do something that involved polynomial divison, in C.
21:02:49 <KipIngram> I basically set up synthetic division - it worked quite well.
21:03:07 <Deformative> Hmm, is it still log(n)?
21:03:09 <KipIngram> Annoying that I can't remember the details.
21:03:37 <Deformative> Well, binary search obviously has a much larger constant since it is log(n) multiplies rather than log(n) adds.
21:04:26 <KipIngram> Sure.  I didn't really worry about that part, though; I just wanted the answer in any kind of reasonable time.
21:04:34 <KipIngram> Geez - why on earth was I doing that?
21:05:29 <KipIngram> Oh - I remember now.
21:06:13 <KipIngram> It had to do with a fancy error correcting code algorithm we were using at work.  I did it in C just to experiment with the algorithm; it ultimately got an FPGA implementation.
21:06:46 <KipIngram> It involved algebra on rings.
21:06:51 <KipIngram> Very cool stuff.
21:07:07 <KipIngram> Galois fields.
21:07:50 <KipIngram> Reed-Solomon coding.  That was it. :-)
21:08:09 <KipIngram> Absolutely fascinating.
21:10:03 <Deformative> Well, I really need to study for my exams.
21:10:17 <Deformative> Talk to you Thursday.
21:10:20 <KipIngram> Good luck.
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