00:00:00 --- log: started forth/09.11.20 00:03:45 --- quit: qFxo (Read error: 104 (Connection reset by peer)) 00:05:19 --- join: qFxo (n=C00K13S@5356B263.cable.casema.nl) joined #forth 00:05:57 --- quit: qFox (Read error: 110 (Connection timed out)) 00:10:16 --- nick: qFxo -> qFox 00:45:20 --- quit: ygrek (Remote closed the connection) 01:14:33 --- join: ygrek (i=user@gateway/gpg-tor/key-0x708D5A0C) joined #forth 01:19:42 --- quit: proteusguy (Read error: 110 (Connection timed out)) 01:20:40 --- join: proteusguy (n=proteusg@110.77.145.40) joined #forth 01:22:46 --- join: ASau (n=user@host195-231-msk.microtest.ru) joined #forth 02:00:50 --- log: started forth/09.11.20 02:00:50 --- join: clog_ (n=nef@bespin.org) joined #forth 02:00:50 --- topic: 'Welcome to #forth. We discuss the Forth programming language and a variety of technical subjects. Introduction and Helpful Reading: http://forthfreak.net/index.cgi?FnFC | ANS/ISO Forth Standard doc: http://tinyurl.com/nx7dx | Gforth compiler: http://tinyurl.com/s8uho | http://quartus.net/search | Paste: http://forth.pastebin.ca | http://www.isforth.com' 02:00:50 --- topic: set by I440r on [Fri Feb 13 08:39:24 2009] 02:00:50 --- names: list (clog_ ASau proteusguy ygrek qFox Snoopy_1611 nighty^ TR2N dinya_ maht_ I440r kleinjt gnomon mathrick segher malyn gogonkt clog nottwo Quartus` schme madgarden scj nighty___ probonono aguai zbrown aguaithegeek KipIngram uiu_ Frek madwork yiyus uiu cataska) 02:07:52 --- quit: nighty^ (Remote closed the connection) 02:14:03 --- quit: clog (Read error: 110 (Connection timed out)) 02:14:03 --- nick: clog_ -> clog 03:07:28 --- join: nighty^ (n=nighty@x122091.ppp.asahi-net.or.jp) joined #forth 03:16:07 --- join: GeDaMo (n=gedamo@212.225.98.255) joined #forth 03:23:15 --- quit: dinya_ (Read error: 104 (Connection reset by peer)) 03:24:01 --- join: dinya_ (n=Denis@188.18.83.251) joined #forth 03:28:56 --- quit: proteusguy ("Leaving") 04:31:42 --- quit: TR2N (Read error: 110 (Connection timed out)) 04:39:34 --- quit: GeDaMo ("Leaving.") 05:25:55 --- quit: ASau (Remote closed the connection) 05:26:16 --- join: ASau (n=user@host195-231-msk.microtest.ru) joined #forth 05:51:50 --- join: tathi (n=josh@dsl-216-227-91-166.fairpoint.net) joined #forth 06:04:14 Neat. I didn't realize "Thinking Forth" was available as a pdf download. 06:23:50 --- join: DrunkTomato (n=DEDULO@217.18.135.36) joined #forth 07:09:47 --- join: dinya (i=Denis@92.255.146.156) joined #forth 07:34:15 --- join: GeDaMo (n=gedamo@212.225.98.255) joined #forth 07:36:47 --- join: PoppaVic (n=pops@99.150.139.232) joined #forth 07:55:55 --- join: TreyB (n=trey@adsl-76-254-113-201.dsl.hstntx.sbcglobal.net) joined #forth 08:05:39 --- quit: nighty^ (Remote closed the connection) 08:07:54 I'm trying to invent a nice set of words for real-time I/O control. I want to include reasonably minimal generic timing functionality in my FPGA, and hook it into the Forth engine. 08:08:24 I haven't thought this all out too carefully yet, but in some sense this will capture the function of interrupts, timer-counters, and so on. 08:08:34 Tried reviewing POSIX? 08:08:50 --- quit: ASau ("off") 08:09:36 You mean to use, or to get ideas? 08:09:47 I had in mind something like this: 08:10:01 OUTPUT 08:10:36 to declare an output and tie it to an FPGA pin. Then I could define a word to manage that signal and store it's CFA like so: 08:12:11 event loop 08:14:53 KipIngram: I'd start by thinking of what you need to handle as input to perform on.. THe syntax will never really be satisfying ;-) 08:19:43 Sorry; my netbook hung and I had to reboot. 08:20:05 This is for interfacing stuff like serial ADCs, DACs, communication links, and so on. 08:21:05 Anyway, my idea is to have a vector queue integrated into my processor hardware. If a word "returns" and there's nothing on the return stack to return to, then the hardware will check the vector queue. 08:21:27 KipIngram: sounds complicated 08:21:32 If it's empty as well then nothing happens until a vector shows up. If / when something is in the vector queue the hardware will go there and run. 08:22:27 Anyway, each of these outputs will have a handler, and when the timer for that output expires hardware will put the address of the handler in the execution queue. 08:23:25 The alternative of course is to poll. 08:23:45 But I might have a lot of I/O, any one of which is very simple, but the polling loop might get pretty involved. 08:24:19 This is really just a timer interrupt facility. 08:24:37 I rather like the idea that something wel-defined happens if the outermost word returns. It just means there's no work to do. 08:25:33 Some of the modern FPGAs also have what they call a "flash freeze" state (at least that's what Actel calls it). In other applications where the interrupts were external instead of based on timers then I could consider flash freezing the FPGA when the outermost word returned, to save power. 08:25:38 still sounds weird. I was reexamining the 8080/z80 rst opcode awhile back. raise an int line, the byte in some port is the int# - handle the i/o 08:25:52 As soon as something "happened" (say, a keystroke) the thing would wake up and execute from the proper place. 08:26:50 Ok, in that case then I'd have code that read the port and executed something based on that. The only difference I'm proposing is that instead of an int # the value that comes in is an actual service routine address, that you'd set during initialization. 08:27:27 And if the processor wasn't doing anything else at the time your service code could start running within nanoseconds. 08:28:40 yeah, it's easier to use a "service-slot" - an array of those addresses - the circular-queue of signals are resolved in the loop, the slot is indexed by the "signal byte" - and you can follow that in the handler with whatever data they need to snag. I'm not a super chip-head, so at this point I;ll just kibitz ;-) 08:28:42 Anyway, the service routine would specify the next value to be written to the output and the time at which that should occur. It would write that information into the hardware and then return. 08:30:46 For inputs the expiration of the timer would cause the hardware to clock the current value of the input into a sample register and queue up the handler address. 08:30:57 KipIngram: you are speaking of the bios-level code anyway, right? or lower - the code to service the magic hw (microcode?) 08:31:05 The handler would read the sampled value, do whatever needed to be done, and set the time of the next sampling eveng. 08:32:14 I think that these hardware functions (queuing up execution vectors and clocking inputs and outputs on timer expiration) would correspond to microcode, yes. The code that gets executed in the handlers, though, would be application level code. 08:32:31 yah 08:32:36 You'd write the signal handlers specifically for your app. 08:32:55 So anyway, when I crashed I was about to type this: 08:33:04 output 08:33:13 ' handler ! 08:33:23