00:00:00 --- log: started forth/04.05.16 04:20:26 --- join: qFox (C00K13S@cp12172-a.roose1.nb.home.nl) joined #forth 05:07:27 --- nick: lalalim_ -> lalalim 05:33:30 --- join: crc (~Charles_C@0-1pool176-15.nas6.philadelphia1.pa.us.da.qwest.net) joined #forth 05:39:35 how do you test one bit? 05:42:02 oh xor it ofc 05:42:06 and 05:42:07 i mean 05:46:44 http://www.forthfreak.net/wiki/index.cgi?IsolateBits has some code for isolating specific bits 05:47:06 well thats been vandalized i guess 05:47:11 oh wait no 05:47:31 huh... that page is behaving very odd in explorer :\ 05:48:30 ohwell, i just needed to check the sign really :) 05:48:47 [ binary 10000000000000000000000000000000 decimal ] literal and 05:48:51 :p 05:49:59 :-) 05:53:59 --- quit: crc ("ChatZilla 0.9.61 [Mozilla rv:1.7b/20040316]") 06:52:43 --- quit: Fractal (Read error: 60 (Operation timed out)) 07:00:55 --- join: snowrichard (~chatzilla@adsl-068-209-159-248.sip.shv.bellsouth.net) joined #forth 07:02:09 hello 07:02:43 hi 07:03:17 how's it going. 07:03:32 ok 07:03:43 I have church in about 40 minutes 07:15:00 --- join: proteusguy (~proteusgu@69.79.24.31) joined #forth 07:32:49 --- quit: proteusguy (Connection reset by peer) 07:33:06 --- join: _proteus (~proteusgu@69.79.24.31) joined #forth 07:50:57 --- nick: _proteus -> proteusguy 09:40:13 --- join: crc (~Charles_C@0-1pool176-24.nas6.philadelphia1.pa.us.da.qwest.net) joined #forth 09:40:23 Hi crc 09:40:32 hi Robert 09:58:55 --- quit: snowrichard ("ChatZilla 0.9.52B [Mozilla rv:1.6/20040115]") 10:15:30 --- join: kc5tja (~kc5tja@66-74-218-202.san.rr.com) joined #forth 10:15:41 --- mode: ChanServ set +o kc5tja 10:39:30 --- quit: proteusguy ("Leaving") 11:10:19 hey kc5tja that rocks 11:13:44 kc5tja> the nop, did that also mean to take the next instruction word? 11:14:14 i think i already asked this, but i'm not sure 11:27:19 No. 11:27:23 It just wastes a cycle. 11:28:33 oh, no it was all 0 that created that effect, wasnt it 11:28:49 yep 11:29:32 I'm actually working on modeling the (new) assembler with an abstract state machine, since my current implementation is so bug-ridden that I feel the need to start over from scratch. 11:30:07 --- join: Herkamire (stjohns@h000094d30ba2.ne.client2.attbi.com) joined #forth 11:31:00 hm, well, i think i'm going quite well with my emulator 11:33:24 Oh, my emulator works fine as far as I can tell. 11:33:31 I think I worked out the last control-flow bug in it. 11:33:50 (there may still be other bugs in it, but certainly none that directly affects control flow, which is THE most important thing to get right). 11:34:07 BUT, an emulator is utterly useless without an assembler for the virtual CPU environment. :/ 11:34:16 hm, control flow isnt all that hard, is it? 11:34:44 It took me about a day and a half to work out whatever bugs were in it. 11:34:56 That's not a terribly long time. 11:34:57 i'm working on my assembler too actually :) but i'm not going for a smart one, i'll fill the words up to maximum efficiency myself 11:35:32 oh, yeah i havent really tested the thing yet. well individual stack operations, and the main cycle thing, but other then jmp 0, no 11:35:34 Well, my assembler can pack instructions just fine. 11:35:48 But, interestingly enough, it's control-flow bugs in the *assembler* that are killing its usefulness. 11:36:04 kinda busted at adding a number 11:36:04 right now i'm creating words for each instruction 11:36:04 the word will leave a proper number on the stack, to be compiled into the memmory 11:36:13 except, how do i tell a number from an instruction... 11:36:16 For example, the ': word is assigning a wrong address to the created word, and I can't for the life of me figure out why. 11:36:27 oh heck i'm not that far 11:36:54 i was kinda talking about the assembler to create bootcode :p 11:37:33 Assembler is assembler is assembler to me. If it takes a program for the FTS1001 and spits out a binary image that the FTS1001 can run, it's an assembler. Doesn't matter whether it's bootcode or appcode or webcode or whatever-code. 11:38:33 (I did hand-code [no pun intended] a program to display "Hello" to the screen yesterday, but attempts to recreate it in assembler have failed. That's how I know the bugs are in the assembler, not in the emulator.) 11:39:00 well yeah, but you first have to create the machine forth assembler, in order to create an assembler in machine forth :) 11:39:35 yeah i thought about that, but i figured i'd want a assembler for machine forth anyhow so i might as well do it now 11:39:35 :) 11:39:48 * kc5tja nods 11:41:45 OK, I'm going to grab some food. Be back in about 15 minutes. 11:54:20 --- join: Sonarman (~matt@adsl-64-160-165-123.dsl.snfc21.pacbell.net) joined #forth 12:10:04 --- join: SDO (~SDO@co-trinidad1a-156.clspco.adelphia.net) joined #forth 12:10:28 http://cgi.ebay.com/ws/eBayISAPI.dll?ViewItem&category=1247&item=4130271491 12:10:34 another Jupiter up for sale. 12:12:42 this one's even more expensive 12:14:32 back 12:15:44 re SDO 12:16:53 !!??!! 12:16:57 WHOA! 12:17:05 To think, my kit will be cheaper than an Ace!! 12:48:26 hey kc 12:48:34 how small do you think it will end up being 12:48:43 In what context? 12:49:01 uh 12:49:05 the size context 12:49:11 No idea. 12:49:13 like physical dimensions 12:49:14 Time will tell. 12:49:38 hmm 12:49:41 Expect it to be about the size of a shoe-box, though. 12:49:47 hmm 12:49:47 (maybe smaller) 12:49:49 too big 12:50:14 will it have good generic output ports? 12:50:19 that i can connect shit too? 12:50:54 It will have an RS-232 port, a PS/2 keyboard port, a PS/2 mouse port, a video port, and probably some generic I/O pins (think Commodore 64 User Port). 12:51:12 i never had a commodore 64 12:51:14 It might even have a parallel port, if I can afford the pin-space. 12:52:03 i just need ports that i can connect to electronics of the more mundane variety 12:52:13 so i can control motors and shit like that 12:52:29 The generic I/O port is probably what you're looking for then. 12:52:57 somethign i could control an LCD with would really nice 12:53:21 It will probably have around 16 I/O bits (each individually controllable), plus a serial port or two if you are able to sacrifice speed for I/O expandability. 12:53:47 well i'll need at least one i/o port for talking to my computer 12:54:02 So use the RS-232 port for that. 12:54:28 any chance of usb? 12:54:40 No. USB is very, very, very, very complicated stuff. 12:54:58 yea :( 12:55:05 Hardware is simple, but it will require a full-blown FPGA all to itself, plus its own DMA engine, PLUS the microprocessor support for it. 12:55:08 i was thinking a usb client [not host] controller 12:55:16 * kc5tja will introduce USB later on, but not in the very first generation of computer. 12:55:37 If I add USB, it'll be both host and controller capable. 12:55:52 that means ill have to get a usb<->rs232 12:55:56 My intent with this box is to use it as my primary desktop computer. 12:56:04 really?!?! 12:56:12 Yes. It always has been. 12:56:26 will it be fast enough? 12:56:35 Fast enough for my needs. 12:56:46 The MISC processor core will definitely be fast enough for many things. 12:57:46 Internet e-mail and playing music CDs don't require a lot of CPU power. I distinctly remember doing those things on my dad's 66MHz 80486-DX/2. :) 12:58:15 I might want to get a specialized version from you. 12:58:23 Besides, you'll be amazed at how much CPU bandwidth a poorly designed OS can suck. 12:58:38 So you're implementing the chip on a fpga? 12:58:44 In short, my goal is to build a replacement for my aging Amiga 500. 12:58:49 The CPU, yes. 12:58:52 (And the video chip) 12:58:59 Not sure how to go about audio just yet. 12:59:13 how hard woudl it be to make just a rs232 console version 12:59:19 No video? 12:59:27 yeah i have a console that i could use with it 12:59:30 a vt100 clone 12:59:37 Oh, man, that's old-skewl. :D 12:59:41 I remember those. :D 12:59:49 or i could just talk to it with my computers 13:00:04 Not too hard, actually. 13:00:16 So you're looking for an embedded, single-board-computer version of what I'm designing. 13:00:27 yeah 13:00:32 (which is not too far from what I've been considering for use in my ham radio projects in the future) 13:00:44 I'd have to do the research on it, but it shouldn't be too terribly hard. 13:00:49 i still want a /computer/ 13:00:56 It'd be a loss for me though, unless I can resell the model to a larger audience. 13:01:48 will it have an ide controller? 13:02:22 Polled I/O to start with. I have zero knowledge on how to do a DMA-based IDE interface. 13:03:01 How many IDE ports do you need? (A single port handles two drives) 13:03:14 i would like some sort of flash media 13:03:26 or the ability to boot of the rs232 port 13:03:52 I don't know anything about interfacing directly to raw flash ROM chips. 13:04:05 basically i want to use it as a controller for my computers 13:04:26 but I am intending on using 28256 EEPROM chips for its boot-up software. 13:04:36 oh okay that will work 13:04:45 --- quit: crc (Read error: 104 (Connection reset by peer)) 13:04:51 what about ram capacity? 13:04:57 Not too sure how to get the circuit to self-program, or even if that is a desirable thing. 13:05:15 warpzero: The MISC is a true 32-bit machine, so the software can handle the PC-equivalent of 16GB of memory space. 13:05:26 er well yea 13:05:34 but i mean physically how much ram are we going to have 13:05:38 No idea yet. 13:05:41 Too early to tell. 13:05:54 well i mean what ORDER of ram capacity 13:06:14 I'm thinking of just using SDRAM slots like what the PC has, so you can use off-the-shelf SDR-SDRAMs or DDR-SDRAMs (nto sure which is easier to use yet) 13:06:27 probably sdr 13:06:36 ddr requires a double-pumped buss remember 13:06:46 Yeah, but if SDR DIMMs become hard to find, then I'll have designed myself into a corner. :( 13:06:57 DDR requires a double-pumped bus, but the clock speed is the same. 13:07:00 true 13:07:03 hmm 13:07:20 Do they even still sell SDR DIMMs on the market? 13:07:24 yes 13:07:27 absolutely 13:08:01 it would be cool if you could make an SRAM version 13:08:25 expensive though 13:08:32 SRAM is *WAY* easier than any SDRAM interface. 13:08:40 By a long shot. 13:08:51 yeah but SRAM isn't cheap any quantity 13:08:59 Comparatively speaking, no. 13:09:49 do you think you could make one cheaper w/o a video and ps2 interface 13:10:08 Yes, definitely. The board space would be smaller, etc. 13:10:13 And its' the board size that is the real killer. 13:10:21 really? 13:10:22 Are you looking to assemble the device yourself, or to purchase one pre-assembled? 13:10:30 pre-assembled 13:10:32 i can't solder :( 13:10:38 no one ever tought me how 13:10:41 Yeah, and every part is surface mount. :) 13:11:02 Yep, I'm charged by the square inch for printed circuit board space. 13:11:28 how much is that? 13:11:35 What kind of production volumes are we looking at? Just one, less than ten, ? 13:11:35 i thought pcb was cheap 13:11:50 depends on how expensive they are 13:12:02 just one probably 13:12:09 i just don't need the video and ps/2 stuff 13:12:17 Blank PCBs are cheap, but to get them etched, tinned, with plated-through holes and all that jazz...it typically is around $0.25/sq. in. 13:12:42 are there alternatives? 13:12:43 And that's only for a two-layer board. 13:12:55 Not for use of surface mount components. 13:13:07 And SMCs are all that exist at this level of design integration. 13:13:36 could you connect them with just thin wire 13:14:11 With pin pitches as small as 0.5mm, I wouldn't want to try. 13:14:23 yikes 13:15:24 if you could make these things cheap enough, fast enough and with a fast enough interconnect i would be interested in purchasing them for an entirely different purpose 13:15:40 and in quantity 13:15:53 but i know ill be buying at least one :) 13:16:02 Define fast enough and "fast enough interconnect." 13:16:23 like 13:16:29 DMA 13:16:55 doesn't matter if its "proprietary" 13:17:07 just so they can talk to each other very quickly 13:18:09 maybe even just registers on the core would be sufficient 13:18:35 because i would love to use these things to make a cluster 13:18:53 Well, DMA of what though? 13:19:04 The CPU will run at 25.175MHz, by my current design. 13:19:20 I *suspect* the CPU can run faster than that, due to the nature of modern FPGAs. But I chose that speed because of the VGA's dot-clock. 13:19:45 well theoretically hmm 13:19:49 I don't want to push it much higher than that though, because that involves PC board design layouts that I have no experience designing (we're getting into some serious RF engineering with those kinds of speeds anyway). 13:20:11 how much space do you have on the fpga 13:20:15 No idea. 13:20:23 I've never designed for an FPGA before ever in my life. 13:21:12 hmm 13:21:27 how cheap are we talking for like just the fpga [not assembled] 13:21:50 I know, I'm making myself sound wonky at this, but it's been almost a decade and a half since I undertook this kind of a project. Technology advances faster than me. :) 13:22:06 The FPGA chip itself is around $14, from every source I have researched with. 13:22:06 heh 13:22:15 okay 13:22:40 i don't think thats going to work for my second application 13:23:07 What application is that? 13:23:12 cluster 13:23:31 Ahh, you're looking for lots of really cheap CPUs to be inter-networked together then. 13:23:37 yea 13:23:47 Each with their own memory buses? 13:23:47 and they don't need much else 13:24:03 well they could use SRAM 13:24:30 aka they would each need their own memory but not necessarily their own memory busses 13:24:47 Well, it's possible that, given a suitable FPGA chip, I can integrate 2, maybe 3, CPU cores on a single chip, plus a cache controller and some internal cache. 13:24:57 yeah 13:24:58 there we go 13:25:11 But I won't go into any further details on that just yet. 13:25:18 nah sok 13:25:20 Not until I have some experience building ONE on a chip. :D 13:25:20 get this done first 13:25:34 i still want a video-less one though 13:25:41 Well, first,I need to get my assembler working. >:( 13:27:27 i could really use a small computer w/ ide and such that had a rs232 console and lots of generic output pins 13:27:47 I can definitely provide that. 13:27:56 and sound would be nice 13:28:20 I'm assuming you want the MISC core CPU too, since it's 4x faster than the 65816 on clock speed and bus timing merits alone, not counting its instruction set. :D 13:28:30 yeah 13:28:35 i don't know much about misc 13:28:35 CPU-driven sound OK, or do you prefer DMA? 13:28:53 whatever you're doing for the main one 13:29:15 It'd be simpler with CPU-fed audio, but the main Kestrel was going to use DMA. 13:29:24 yeah i mean 13:29:35 i just want a Kestrel w/o video basically 13:29:43 and set to console on rs232 13:30:13 BTW, not sure if this is appealing to you or not, but the MISC will have something like 3 cycles of interrupt response overhead, not counting the time it takes to finish an instruction packet. Therefore, worst-case interrupt response times will be something like 11 clock cycles. 13:30:33 i don't know 13:30:36 what that implies 13:31:34 Suppose it is 10 cycles latency, and the CPU is running at 1MHz (for simple math). That means that, when an external hardware device interrupts the CPU, the microprocessor will respond to the interrupt no more than 10us after seeing the interrupt. 13:31:59 this is going to affect disk access the most? 13:32:13 It affects *anything* involving I/O. 13:32:20 Including your own devices if necessary. 13:32:57 is there some way to avoid this? 13:33:10 i mean 13:33:19 i don't know how much it will slow down I/O 13:33:25 10 cycle latency is considered absolutely, fantastically, 100% excellent. 13:33:33 oh okay 13:33:37 10 cycles -- 10 lousy clock cycles. 13:33:49 Dude, most x86 CPUs take HUNDREDS of cycles. :) 13:33:53 I assume that rs232 is slow enough that it wont matter at all. 13:34:06 Correct. Likewise even with IDE. 13:34:11 Oh okay! 13:34:16 Since the IDE interface only interrupts the CPU when it has a full sector to transfer. 13:34:17 In this case I am excited. 13:35:00 My generic pin stuff shouldn't be a problem. 13:35:14 It should really be all output, so not much need for interupts. 13:36:14 * kc5tja nods 13:36:40 lighting up lights and such 13:37:27 so basically im just looking for a Kestrel but with an rs232 console isntead of a video controller 13:37:38 and ill leave the rest up to you 13:37:51 Okies 13:38:18 The best way to keep up to date is to periodically (say, once a week or so) check up on my weblog and Kestrel pages. 13:38:24 http://www.falvotech.com 13:38:34 I will be posting progress there as regularly as I can. 13:39:14 Maybe you could modularize it so that the video controller uses a virtual rs232 internally? 13:39:29 just a thought 13:40:02 Video controller is entirely graphical -- absolutely no text-mode what-so-ever. 13:40:09 oooh 13:40:35 and we're talking dsub15 vga 13:40:39 Yes. 13:41:20 well thats cool, its still not what i need 13:41:22 but cool 13:41:55 what kind of resolution are we talking? 13:41:59 and colorspace? 13:42:23 well, that's up in the air too. 13:42:31 Now that I'm going to MISC, I'm thinking of changing the video specs around. 13:42:37 CURRENTLY, it's this: 13:42:48 320x240 or 320x480, up to 16 colors out of a palette of 256 colors. 13:42:50 because i think you may be extremely close to making an extremely cheap thin client 13:42:58 640x240 or 640x480, up to 4 colors out of 256 color palette. 13:43:11 However, I'm seriously considering going for some serious hardware simplifications: 13:43:24 320x240 or 320x480 at 65536 true-color 13:43:35 640x240 or 640x480 at 256 color fixed palette. 13:44:00 hmm 13:44:02 I will have to run some simulations to see which is more workable. 13:44:21 your site is rendering wrong 13:44:39 If you're using IE, your browser is interpreting the site wrong. 13:44:45 mozilla 13:44:53 the bar to the left is on top of the bar to the bottom 13:44:55 Works fine for my Mozilla. 13:45:03 Oh, that's fine. 13:45:16 Increase your font size from nanoscopic to microscopic. :) 13:45:23 >:( 13:45:26 Hehe :D 13:45:40 What resolution and font size are you using? And what page? 13:45:49 1600x1200 13:45:51 small 13:45:55 Kestrel 13:46:41 Yeah, not much I can do about that -- that's an inherent limitation of the way CSS works. :/ 13:46:53 uh 13:46:57 I am planning on moving the donation button to the bottom bar, and the certifications to the left bar. 13:47:04 That ought to make things a bit better. 13:47:14 okay 13:47:25 I just haven't gotten around to it yet. 13:47:41 is it possible to make self-programming fpgas? 13:48:19 No. FPGAs cannot program themselves. However, if you have TWO FPGAs, it is possible to have them cross-program each other. 13:48:24 But very difficult. 13:49:33 hmm 13:49:40 how fast does an fpga program? 13:50:06 No clue. It depends on whether it's serial or parallel programmed, and how big the device is. 13:50:38 And they normally program from eeprom right? 13:51:48 Or do they retain their programming over power cycles? 13:51:52 Yep. Serial EEPROMs usually, actually. 13:51:57 Well, depends on the device. 13:52:05 Some recent devices have non-volatile memories in them. 13:52:22 But most are still just made from SRAM cells, so they need an external program source. 13:52:50 for my cluster project, if it could reprogram the chips really fast 13:53:02 it could be very cool 13:53:47 The bad thing with FPGAs is that programming them is an all-or-nothing proposition: to change even a small element of the circuit, the WHOLE CHIP needs to be reprogrammed. 13:53:59 hmm 13:54:02 However, I know for a fact that Xilinx parts have a parallel interface option for programming them. 13:54:03 i kindof thought that 13:54:27 Kestrel will probably boot via the serial EEPROM method, though, to keep costs down. 13:54:34 yeah sure 13:55:24 So why did you decide to switch to using a fpga-based core? 13:55:34 Cost reasons, for the most part. 13:55:45 cheaper than a real cpu? 13:56:10 No, it's actually about the same price as using a CPU off-the-shelf and in the same performance category. 13:56:20 wow 13:56:24 cool 13:56:26 But the MISC core is a real Forth engine -- most other CPUs are RISC engines, designed to run C. 13:56:34 aha 13:56:36 yes 13:56:38 i see 13:57:00 Besides, the bus interfaces for these other chips are grotesquely more complicated than the one I'm designing around (a variation of the Wishbone interface). 13:57:10 right 13:57:16 and you prefabbed controllers and stuff 13:57:21 er prewritten 13:57:24 from opencores 13:57:25 Yep. 13:57:43 I'm also planning on releasing the FTS1001 as an open-core. 13:57:50 wow, that FORTH computer went for 466 USD :) 13:58:13 SDO: Sweet. Now I have justification to charge y'all $500 for the finished Kestrel! BWAAHAHAHAH! 13:58:23 :( 13:58:31 j/k man, j/k!! 13:58:37 :) 13:58:38 My target price is still $130 or less. 13:58:45 :) 13:58:52 (in kit form, that is.) 13:59:08 Hoepfully, if I play my cards right, it'll end up less than $100. 13:59:20 wan't my forth computer, wish I could afford one. 13:59:27 maybe find one at a thrift store. 13:59:39 problem is that most that own it already know the market for FORTH stuff is high. 13:59:51 yeah for my cluster project the optimum would be a reconfigurable MOVE-type core 14:00:25 with massively fast interconnects 14:00:50 warpzero: Not sure if you noticed or not, but my MISC engine has LOTS of memory accessor instructions: I have an A and B pointer register, *AND* the top of return stack can also be used as one. Thus, it's easy to implement two-source-one-destination vector operations with the FTS1001. 14:01:18 Quite unlike any other MISC CPU in the world or on the market today. 14:01:43 are you writing the VHDL for this sucker? 14:01:48 After playing with the J programming language, I'm absolutely convinced of the viability of vector programming. 14:01:55 warpzero: Verilog, actually, but yes. 14:02:05 huh 14:02:09 hows that coming along hehehe 14:02:25 I've not even started. I'm still working on the CPU emulator and assembler sources. 14:02:33 ah right 14:02:51 The idea is to kinda sorta get a quasi-working Kestrel running under GForth to give folks some idea of what the machine will be like. 14:02:58 Maybe then folks will consider donating to my cause. :D 14:03:17 10 donations buys the FPGA programming materials. :D 14:03:24 because i think that scince my language has a near-FSM output mode I could really abuse fpgas 14:03:25 Well, 9 now -- Fridge already donated. 14:03:41 you know? 14:04:05 Funny you should mention FSMs. I'm currently re-engineering the assembler using abstract state machines as a formal design method. I'm planning on using it to verify correctness too. 14:04:21 the problem though is it can't make an FSM 14:04:52 it makes Infinite state machines 14:06:00 whooohooo, just sold 7 byte mags online for 40 bucks :) 1981 issues. 14:06:17 :) 14:06:24 so it has to get an FSM by expanding infinity along some other axis 14:06:33 they have forth articles in them too. 14:06:38 SDO: Almost seems not worth it. :) 14:06:39 like time or multiple CPUs 14:06:41 I'm gonna scan them and post them for us FORTH wackos here. 14:06:52 SDO: Yes, definitely! :) 14:06:58 i am such a nutcase 14:07:01 And let me know a URL to access them -- I can put it in my weblog. 14:07:06 warpzero: :) 14:09:01 but with quickly reprogrammable fpgas i could make my shit go FAST 14:10:17 i need to get my shit working on ppc 14:16:04 tought about scanning the entire FORTH issue into the PC here, would take me a week or so, and destroy an issue, but it would be fun. 14:16:24 I have 2 or 3 of them around. Wonder if I should sacrafice one issue for the betterment of FORTHers everywhere :) 14:17:09 I'll leave that decision up to you. But why would it destroy an issue? 14:17:15 Is the magazine binding falling apart? 14:17:39 nope, but to scan properly I would have to have the binding sheared off. 14:17:53 the mag isn't scannable without distortion unless each page is flat on the scanner. 14:18:08 the only way I would scan the mag is if I did it right, and to do it right would be to destroy the mag. 14:18:27 Hmmm 14:18:40 Pity, but understandable. 14:21:32 --- join: lalalim_ (~lalalim@p508AAB02.dip.t-dialin.net) joined #forth 14:21:41 --- quit: lalalim (Read error: 60 (Operation timed out)) 14:21:48 kc5tja: well im outties 14:21:57 Okay. 14:22:11 just make sure you use a good dac for the sound 14:22:26 Thanks for the feedback. I'll definitely consider that single-board computer design you expressed interest in, and will post details of my research on my site. 14:22:34 okay 14:22:37 warpzero: Any suggestions? 14:22:47 The Kestrel was to have an 8-bit DAC for simplicity and low pin count. 14:31:23 --- quit: warpzero (Read error: 60 (Operation timed out)) 14:41:53 --- join: warpzero (~warpzero@dsl.142.mt.onewest.net) joined #forth 15:01:40 --- join: blockhead (default@dialin-737-tnt.nyc.bestweb.net) joined #forth 15:01:46 re blockhead 15:02:08 * blockhead re-blocks himself :D 15:02:22 how are things? 15:02:29 I'm currently working on the new assembler theorems. 15:02:41 * kc5tja is using abstract state machines to prove the correctness of the assembler design. 15:02:52 * blockhead usually doesn't see "Assembler" and "theorum" in the same sentance :D :D 15:03:04