00:00:00 --- log: started forth/04.04.10 00:41:25 --- quit: thin ("leaving") 00:52:41 --- quit: slava ("Leaving") 02:22:29 --- quit: kc5tja ("Lost terminal") 02:53:30 --- join: onetom (~tom@novtan.bio.u-szeged.hu) joined #forth 03:15:51 --- join: qFox (C00K13S@cp12172-a.roose1.nb.home.nl) joined #forth 03:44:34 happy easter 2u all 04:00:59 you too 04:38:29 thats like one day early... 04:46:32 who cares :) 05:06:33 --- join: madgarden_ (~madgarden@derby.metrics.com) joined #forth 05:06:48 --- quit: madwork (Read error: 104 (Connection reset by peer)) 05:47:05 hmmmm whats the fastest way to do < and > ? 05:47:18 (greater/lesser then operators) 05:47:36 cmp ? 05:47:44 I guess that depends on your Forth. 05:47:49 machine forth 05:48:04 so with and com xor add 05:48:19 basicly :p 05:48:38 Then I have no idea. Bit magic *shrug* 05:48:41 winforth seems to do it quite short 05:48:52 gforth has a bit larger approach 05:49:06 but i thing winforth cheats :p 05:49:11 see < 05:49:11 < IS CODE 05:49:11 40197C 58 pop eax 05:49:11 40197D 3BC3 cmp eax, ebx 05:49:11 40197F 7C09 jl 40198A ( < : 0xE ) 05:49:12 401981 33DB xor ebx, ebx 05:50:11 but i think gforth loops it or something :\ that would seem to create quite some overhead, wouldnt it? 06:02:50 and its like impossible to search for in google... :\ 06:11:00 --- quit: madgarden_ (Read error: 104 (Connection reset by peer)) 06:59:54 its like impossible to find a asm definition of > 08:12:38 --- join: Herkamire (stjohns@h000094d30ba2.ne.client2.attbi.com) joined #forth 08:19:59 Herkamire> do you know how to define < and > ? 08:24:37 hhmmmm 08:24:46 cant find any definition for it 08:24:55 (its not easy to search for it anyhow) 08:24:58 < > are ignored 08:25:07 : > swap - 0x80000000 and if TRUE else FALSE then ; 08:25:08 and greater then/lesser then dont give the results i need 08:25:38 they are prebably usually defined in machine code 08:25:51 well yes thats sort of what i meant anyways :) 08:26:11 i need to do this comparison for my version of NUMBER? 08:26:27 but then it hit me that i have no idea how < and > are implemented, i always take them for granted :p 08:28:17 in herkforth I decidid to write >if and and < 08:28:20 [17:25:05] : > swap - 0x80000000 and if TRUE else FALSE then ; 08:28:22 thats proper? 08:28:29 i mean, that works? 08:28:43 I think so 08:28:56 < would be the same except without the swap 08:29:01 oh of course... 08:29:08 sub one from the other 08:29:12 if it returns negative 08:29:14 right 08:29:15 check for flag 08:29:16 etc 08:29:17 ic 08:29:29 if top bit is set then it's negative. 08:29:43 yea i get it, tnx :) 08:30:00 did you want to implement it in machine instructions? 08:30:34 i'll need to for number? 08:30:51 my number will sub 48 from the char, then check if its below the number in base 08:31:04 if so, its a valid number and the value for that digit is added to the total 08:31:19 i know thats not quite clear, but i havent made the entire code yet 08:31:33 (and i dont know how other NUMBER? 's do it) 08:32:54 but i'll need the < for the check in machine lang :) 08:33:27 what machine? 08:33:33 the p24 08:33:53 oh cool. p24 has an instruction to branch if tos is negative 08:34:04 hmm 08:34:05 only jz 08:34:17 oh and jnc 08:34:30 but i'm not quite sure when thats usable... :\ 08:35:24 but thats the only two conditional jumps the p24 has 08:35:26 oh. jnc 08:35:33 jump if it didn't go negative 08:35:50 hm, no i thought it was jump if carry bit not set 08:36:12 so only valid after addition or mul (i think?) 08:36:12 right 08:36:52 but not sure when that comes in handy 08:38:16 --- join: networm (~networm@L0651P02.dipool.highway.telekom.at) joined #forth 08:38:24 hello 08:38:51 : > COM 1 + ADD JNC 1 ret then 2 ; 08:39:26 hi networm :) 08:39:52 hmmmmmm... I don't think that's right 08:40:31 I think I just gave you <= 08:42:10 oh, it's ok, just replace the 2 with a 0 08:43:54 I'm not sure, you'd have to test it 08:44:04 qFox: follow? "COM 1 +" is NEGATE 08:44:09 aye noticed 08:44:16 but 1+ is like 08:44:34 6 slots... 08:44:57 but on the other side its the only way to subtract 08:45:01 so thats ok i guess 08:45:03 wait... is negate "COME 1 -" ? 08:45:14 there's no - in p24 set 08:45:18 no sub 08:45:19 or w/e 08:45:39 that's ok. you just do 0xffffffff + 08:45:43 aye 08:46:22 hmmmm. It's plus anyway :) 08:46:46 i;ll figure it out :) tnx 08:46:57 watching snooker atm 08:48:27 hmmmm... I think it's actually this: : > COM ADD JNC 1 RET then 0 ; 08:48:52 COM ADD JNC 1 RET 0 RET :) 08:49:38 hm actually i dont think jnc eats tos, does it... so it should be dropped... or well doesnt matter since its not the forth word i'm defining 08:50:16 ahh 09:36:40 --- quit: Robert ("brb") 10:13:00 --- join: crc (crc@ACACB3CA.ipt.aol.com) joined #forth 10:57:20 --- quit: networm (Read error: 60 (Operation timed out)) 11:00:58 --- join: Robert (~snofs@c-f55a71d5.17-1-64736c10.cust.bredbandsbolaget.se) joined #forth 11:06:39 --- join: networm (~networm@L0632P12.dipool.highway.telekom.at) joined #forth 11:20:11 --- quit: crc ("Leaving...") 11:37:14 --- join: jma (jma@dialup-4.228.252.70.Dial1.Denver1.Level3.net) joined #forth 11:37:59 --- join: thin (thin@bespin.org) joined #forth 11:49:25 --- part: networm left #forth 11:59:23 --- join: slava (~slava@CPE00096ba44261-CM000e5cdfda14.cpe.net.cable.rogers.com) joined #forth 11:59:26 y0 11:59:40 Hi 12:11:56 what's new 12:13:36 Not much 12:38:43 --- quit: ianp` (Remote closed the connection) 12:39:59 --- join: ianp` (nobody@c-24-13-109-164.client.comcast.net) joined #forth 12:50:51 --- join: kc5tja (~kc5tja@66-91-231-74.san.rr.com) joined #forth 12:51:03 --- mode: ChanServ set +o kc5tja 12:52:52 hio 12:53:08 * OrngeTide waits for a billion linux packages to download to his ibook. 12:53:43 * kc5tja just installed the core gEDA software 12:53:49 * kc5tja is still trying to learn how to use gschem 12:54:50 hi OrngeTide 12:55:17 gEDA? as in gnome/gtk ? 12:55:31 It's a GTK application, not Gnome. 12:56:09 most things that start with g are gnome/gtk or just gtk. :) 12:56:29 The g in gEDA stands for GNU. 12:56:43 kc5tja, neat. I've been trying to use chipmunk for things. i'll have to try gEDA 12:56:52 kc5tja, I see. 12:56:55 It's got a learning curve. 12:57:03 It's also not feature complete. 12:57:06 to be consistant it should be gnuEDA .. :) 12:57:16 But I'm thinking it is complete enough for me to use for my project. 12:57:25 yea. what EDA doesn't have a learning curve? chipmunk is totally impossible to learn. :P 12:58:09 you designing some small board or something? 12:58:21 Small? 12:58:29 Physically, maybe, but not conceptually. :) 12:58:36 I'm designing the ForthBox Kestrel. 12:58:48 speaking of small have you guys heard about this? http://www.ti.com/corp/docs/landing/msp430day/index.htm .. free lunch seminar on TI MSP430 micrcontroller. they give you a free watch build out of the lower power MSP430 for going. 12:59:06 I'm sure there are already tons of ofrth tools for MSP430. gcc works for it too if you want to use yucky C :) 12:59:16 kc5tja, forthbox eh? what's it like? 12:59:39 s/ofrth/forth 13:00:10 Take the Commodore 64, sprinkle in a little bit of Amiga, with a dash of Atari ST. Add 2 cups of Forth in ROM, and stir. Bake at 350 degrees for 2 hours. Serve chilled. 13:00:36 i see. 13:00:39 It's a kit computer -- e.g., you would build it yourself, right down to soldering the components. 13:01:11 It would ship with around 1MB of RAM on the board. It has a 12.6MHz 65816 CPU, a 16-bit superset of the 6502 processor. 13:01:19 a couple years ago I was all into building a small Z80 video terminal that ran forth. I wanted a home computer basically. I think PCs are boring 13:01:23 kc5tja, nice. 13:01:37 kc5tja, i've always wanted a kit computer. 13:01:47 It will display directly to VGA monitors; 320x240 or 320x480 in 2, 4, 8, or 16 colors, and 640x240/640x480 in 2 or 4 colors. 13:03:34 I see. neat. 13:04:01 I kind of like BGR233 palette. 8-bit "true color" 13:04:30 but that uses a lot of ram and required a more complex video controller 13:04:34 my sticking point on doing my own homebrew is the video. the only reasonable way I've seen was to get a smallish fpga and do it in there. 13:04:47 I will have a 256 color palette, formatted as RRmGGGBB, where the 'm' bit serves as bit 0 for both the red AND the blue channels (hence the 'm' name: Magenta). 13:05:16 kc5tja, also for forth you really need 512x384 pixel display so you can view a 64x16 block in an 8x8 font 13:05:26 No you don't. 13:05:33 kc5tja, oh. a magenta. neat. 13:05:49 With a 320x* display, you can use a 5-pixel wide font too. 13:06:52 kc5tja, that's true. like this font: http://hea-www.harvard.edu/~fine/Tech/x11fonts.html .. which is free. I was using it for the emulator I was writing for the Z80 I wanted to build 13:07:07 but like I mentioned before I never could figure out what to do about video hardware 13:07:29 Video hardware is pretty easy to do. 13:07:30 that font is 4x8 actually. 13:07:57 kc5tja, i'm not interested in putting two dozen chips on a board to do video. 13:08:08 and nobody sells a video chip for an MCU. :( 13:08:09 I can theoretically get 320x* at 256 colors on my bus, but that crowds out the audio and PIB DMA channels. 13:08:20 OrngeTide: I will. >:) 13:08:22 kc5tja, use a seperate bus. 13:08:29 OrngeTide: Too expensive 13:08:40 kc5tja, use an fpga. then extra busses are free 13:08:49 The Kestrel needs to sell at or under $120, or it won't ever sell at all. 13:08:53 dual port memories:) 13:09:01 kc5tja, yea. i agree on the price. 13:09:08 OrngeTide: No, because you still have to route the wires, and place two sets of RAM chips -- extra board space costs MONDO bucks. 13:09:27 you can get OTP fpgas for less than a dozen CMOS/TTL logic chips 13:09:34 If I didn't ahve to pay for board space, the cost of the Kestrel's raw parts would fall easily under $40 even with all discrete components. 13:09:49 too many chips eat way too much board space. 13:10:16 I think we're talking about two different things here. 13:10:18 kc5tja, is that 65816 pretty cheap? 13:10:34 OrngeTide: Considering its performance compared to competitors, it's cheap enough. 13:10:47 i know you can get arm thumb for really cheap in quantity. even in singles you get get them for around $15 which is not bad for a prototype quantity. 13:10:50 It's $5.75 last time I checked, in quantities of one, capable of 14MHz operation (competitive with a 14MHz 68000). 13:10:57 nice. 13:11:35 Let me put things into perspective: 14MHz 65816 with 8-bit data bus is performance competitive to the 14MHz 68000 with 16-bit bus. >:) 13:12:08 Obviously, though, each CPU has its strengths. If the 68000 were cheap enough and plentiful enough, I probably would have chosen that CPU instead. 13:12:24 60Mhz arm thumb might make sense. you could use the extra clocks to do software driven i/o and eliminate some hardware. (at the cost of processing power) 13:12:25 I love the 68000. Awesome CPU. But, unfortunately, sources are dwindling fast. 13:12:40 kc5tja, yea. 68k is overpriced too 13:13:00 OrngeTide: Only because Motorola is explicitly trying to kill it off, which is stupid. It's their (or was their) cash cow. 13:13:01 MSP430 is a nice chip. but it's a micro controller and can't address external memories. it's 16bit though. 13:13:12 so this 65816 is going to be around for a while? 13:13:15 What does the M stand for? 13:13:29 kc5tja, mixed 13:13:39 it's analog/digital 13:13:41 OrngeTide: It's been around for two decades, and is still in production by the company that invented it. In fact, that's all they produce. 13:13:51 oh. that's neat. 13:14:20 Invented by Bill Mensche, the inventor of the 6502 itself. 13:14:38 kc5tja, have you compared prices, performance or complexity of design between 65816 and arm thumb (like atmel AT91 is a good thumb) 13:15:16 Price is decent, but the bus interface is woefully complex compared to the 65816. 13:15:32 The 65816 has a data bus, an address bus, a R/W line, a few interrupt lines, and a bus clock. That's it. 13:16:02 When clock is low, the data bus has A23..A16 on it, so you need to latch that. But when clock is high, data transfer occurs normally. 13:16:03 hrm. i'm looking at a site. it seems pin compatible with 6502? 13:16:30 It's a very synchronous bus, but it does support the RDY signal, which can slow the bus down to accomodate slower devices. 13:16:36 Mostly; it's not 100% compatible. 13:16:44 bus interface on arm thumb seemed pretty simple to me. they even bring out programmable chip selects 13:16:45 But the pinout is deliberately designed to minimize re-engineering costs. 13:17:31 kc5tja, yea. 6502 is dead simple to put into a project. so I will admit that this 65816 is looking to be easy to deal with 13:17:41 * kc5tja is writing the datasheet for the FTS1002 (my own chip design), which is designed to interface the 65816 at 12.58MHz to the Kestrel's "K-Bus", which interfaces to RAM, and the DMA-capable I/O chips. 13:18:07 no S-100 bus? awww 13:18:13 The K-Bus is a direct implementation of the Wishbone bus specification, only adapted for use outside of programmable logic. 13:18:41 The 6502/65816 implements some 90% of the raw functionality of the Wishbone bus out of the box. 13:18:43 for RAM will you use 30pin simms? I have like 256Mb in brand new 4Mb 32-pin simms. 13:18:47 No. 13:18:57 SRAM then? 13:18:59 I'm using 30 to 35ns SRAM chips, direct-soldered to the board. 13:19:10 that's too bad. 13:19:18 ? 13:19:33 They don't make RAMs that fast in DIP form anymore, so I can't leave sockets. 13:19:51 you need RAM that fast? 13:20:07 What is the reciprocal of 25.175MHz? :) 13:20:19 oh. i thought you said it was 14Mhz 13:20:36 I interleave CPU and DMA access to the memory. 13:20:41 gotcha. 13:21:10 From the CPU's perspective, the DMA engine accesses memory during phase-2 low, while the CPU accesses memory during phase-2 high. 13:21:19 14MHz DMA is pretty fast, imo 13:21:56 Well, let's do some math: 13:22:33 31.5kHz horizontal refresh rate * 400 pixels per scanline = 12.6MHz. 13:22:42 oh. you use DMA for video. 13:22:46 So I need a 12.6MHz dot clock to handle the 320 pixel resolution 13:22:51 As all video chips do. 13:22:59 if you're putting SRAM on there you could just use dual port memories... 13:23:06 $$$ 13:23:26 yea. but you could eliminate your need for SRAM for system memory entirely. 13:23:32 High speed cache SRAMs are cheap, thanks in large part to all the 486 boxes that Intel produced. :) 13:24:01 Well, I can't use SDRAM without a monsterous performance hit. 13:24:11 well do it however you think is going to work out best. I'd like to try it out when you're done :) 13:24:22 well SDRAM is a PITA without cache. 13:24:41 Exactly. That's why I'm avoiding it like the plague in this design. 13:24:42 otherwise you have to play difficult games trying to get bursts to happen 13:24:55 of course arm thumb has cache.. :P 13:25:02 --- join: BoomBoX (BoomBoX@cd51146b1.cable.wanadoo.nl) joined #forth 13:25:08 And the nice thing about the 65816 is that it doesn't need cache, and therefore, has near zero latency for all kinds of instructions. 13:25:39 My higher end kit computers, which I'll work on once the Kestrel is finished, will have a MISC core as its central processor. 13:25:56 kc5tja, EP32 or your own MISC? 13:26:04 My own, 32-bit MISC engine. 13:26:16 i see. 13:26:57 To take advantage of the higher clock rates possible on FPGAs, I am thinking of employing SDRAM for that as well. 13:27:02 my friend is writing the debugger for his MISC engine now. he has 16 processors on one fpga. 1 master with 15 slaves. he is doing some parallel chess algorithms on it. although his MISC is only 16-bit 13:27:07 Still using the K-Bus (though it'll be a 16-bit or 32-bit variant). 13:28:09 The Raven will almost certainly have 640x480 at 256 colors, at the very least though, and a true 16-bit palette. 13:28:39 his engine just uses the built-in dual port memories in the fpga. one code area for master. one shared between all slaves. and then data areas for each chip. all shared with the master. about 18kB of data per slave 13:28:52 kc5tja, that sounds neat. 13:29:12 Wow, didn't think modern FPGAs had that kind of RAM capacity. 13:29:27 for a kit computer i'll probably end up buying gumstix.com .. unless I can find a better option soon 13:29:47 kc5tja, yea. Xilinx Virtex parts have a lot of block ram 13:30:05 of course they are very expensive too 13:30:07 Oh, now see, I patently do not consider anything based on a gumstick a kit computer. 13:30:16 That's like calling a self-built IBM PC clone a kit computer. 13:30:30 kc5tja, ehhe. i like to think of the gumstix as a processor. 13:30:35 since it doesn't have any worthwhile I/O on it 13:30:46 except for maybe MMC 13:30:53 I suppose. 13:31:42 i might just give up and buy one of those palm pilots or something and just focus on coding the OS I want and give up on doing any sort of hardware. 13:32:05 I used to feel that way myself. 13:32:07 because nobody makes a kit computer... 13:32:22 it would be really cool i have a little handheld computer with a little thumb keyboard. whose OS was a forth! 13:32:22 and i don't want to design my own from scratch. because it probably won't work. 13:32:22 Then I got fed up with trying to reverse engineer or swindle tech firms for developer documentation. 13:32:42 slava, that's what i was goign to write on palm hardware. 13:32:43 OrngeTide: Well, that's where I come in. :D 13:32:56 kc5tja, yes. now hurry up. 13:33:01 Gimme money. :) 13:33:08 I'll pay $100ish for a kit 13:33:34 Sure, I would too. 13:33:55 kc5tja, i like to think most hacker types would 13:33:56 But, like I said, I still have to write the Verilog and chip documentation for its support chips. 13:34:50 My question is this though: Given a piece of Verilog, how do I know what chip it can synthesize in? I have to invest cash into some programmer to find this out. I'm not too happy with that, because there is always the chance that my design won't work in ANY of its supported chips. >:( 13:34:52 kc5tja so you are using CPLD's as support chips? 13:35:13 The design I'm working on now is intended for use in a CPLD, so I can sell that as a discrete component to other hackers. 13:35:28 The Kestrel's bus interface chip will also include the eight DMA channels it needs for video, audio, and the PIB. 13:35:40 and with CPLD's you are still holding on to the trough the hole parts only? 13:35:54 kc5tja, get Xilinx WebPACK. it's free. (but for windows, eww. I hear it runs under wine though). 13:35:54 --- quit: jma (Operation timed out) 13:35:57 No CPLDs come in through-hole varieties. I'd love it if they did. 13:36:07 well, i use them PLCC with sockets 13:36:17 and with WebPACK you can see if your verilog is going to work at all in xilinx parts 13:36:17 How much are the sockets though? 13:36:25 little bit dense to solder with wire wrap wires 13:36:36 i have now made an project with an plcc85 13:36:38 84 13:36:43 plcc 84 i mean 13:36:46 Cost? 13:36:47 Please? 13:36:48 :) 13:36:49 i don't like through-hole anymore. it's cheaper/easier to make boards without holes in them and just SMT it 13:36:57 Last I checked, PLCC sockets just aren't cheap. 13:36:58 the part? 13:37:20 well i bought the socket for 1.6 euros at the local electronics shop 13:37:24 The part will almost certainly cost around $15 or less. 13:37:43 the part i use is an xilinx 9572 PLCC84 for about 12 euro's 13:37:57 i am not up to date with euro to dollar conversion 13:37:57 sorry 13:38:02 * kc5tja is thinking of going with Cypress CPLDs because they have very predictable timing. 13:38:15 and the price is for 1 unit, i ordered them at farnell 13:38:25 Atmel has cheap low-eng fpgas. and Altera has good prices on higher end fpgas. 13:39:00 well cheap is one thing, but you need good tools/programming hardware to make it work 13:39:06 and smd skills :P 13:39:12 something i dont have 13:39:19 yea. Xilinix has the best tools from what EEs I work with tell me 13:39:30 OK, there's one for $1.76 on Digikey's website. 13:39:35 BoomBoX, but a bunch of cheap SMT parts and practice. 13:39:48 * OrngeTide wanders off. have fun! 13:39:55 yeah i started now with xilinx CPLD's my local ditributor carries them cheap and they are PLCC 13:40:13 BoomBoX: Cheap is ultimately what counts. 13:40:19 well i have used an paintstripper to remove a bunch of old hardware so i am going to resolder to pracice 13:40:34 kc5tja: i hear you, i am a poor student so i need to save where i can 13:40:46 BoomBoX: And I need to maximize profits. 13:40:58 72 macrocell cplds for 5 euros is quite cheap, and ordering via farnell is without delivery here in the netherlands 13:41:08 To be a truely profitable venture, a 300% markup is typically charged on products. With the Kestrel, I'm falling WAY under this "rule of thumb." 13:41:20 BoomBoX: I'm not in the netherlands. 13:41:23 * kc5tja is in USA. 13:41:34 But we're jumping ahead of ourselves. 13:41:44 What all comes in a macrocell though? 13:41:57 but about the CPLD's? what you are going to use them for what part? 13:41:57 Is that equivalent to 72 *bits* or 72 *bytes* of internal storage? 13:42:02 depends on manifacturer 13:42:19 All the mfr's I've seen use 72 *bits* (1 bit per macrocell). 13:42:22 each cell has so called pterms associated with them 5 per cell, you can put an verilog equation in them 13:42:28 Since one macrocell maps to precisely one I/O pin on the device. 13:42:51 Well, that depends. 13:43:04 Let me put up what (little) I have on the FTS1002 so you can see what I'm up to. 13:43:07 depends on the complexity of the equation 13:43:33 ah well i have been reading on the video system of the kestrel, i had some questions about that if you dont mind 13:43:42 http://www.falvotech.com/datasheets/fts1002.pdf 13:44:23 Well, the website is old. I should be able to eradicate 50% of your questions by saying that the new Kestrel design no longer CPU-feeds the video; it's now DMA fed. 13:44:36 I just haven't had any time to update the site. 13:44:56 pfew 13:44:57 okay :) 13:45:12 But even if it did, it'd still be a viable design. 13:45:13 well i was working on an video generator with ram replacement, for my own projects 13:45:45 kc5tja: well i tought the cpu cost was little bit high 13:45:54 thats why i wanted an different solution 13:46:09 CPU cost a little high? 13:46:16 well as i can read in the pdf you need some reasonably dense cpld 13:46:22 well in terms of cycles 13:46:25 It's performance competitive with a 20 to 25MHz Z-80 clone that costs about the same price. 13:46:37 sorry, its in terms of cycles 13:46:49 I don't understand what you're talking about. 13:47:05 Let's talk about one thing at a time. 13:47:09 What about the CPU and its cycles? 13:47:51 well that the cpu based refresh would cost imo a lot of cpu performance 13:48:02 Yes, it'd cost 73% of it. 13:48:03 the cpu based video refresh 13:48:21 thats a lot 13:48:22 Sinclair ZX-80/ZX-81 had a similar issue. 13:48:30 yeah i remember something like that 13:48:34 But it kept the cost of the product to managable levels. 13:48:56 indeed, but you where going to use an PIC for video signal management? 13:49:13 For generation of HSYNC, VSYNC, and display enable NMI, yes. 13:49:27 i was working on an CPLD based replacement, that also encorporated some kind of video ram 13:50:20 so the video would be just another memory block 13:50:20 My DMA engine will fetch video data out of system memory. 13:50:49 yeah you told me :) 13:51:14 big performance win 73%, will it add a lot to the cost? 13:51:34 That question does not parse. Can you rephrase? 13:52:03 well an 73 % performance win is quite nice. but will it add a lot to the cost? 13:52:21 That remains to be seen. 13:52:30 I still have to write the Verilog code for this stuff. 13:52:35 Then I have to find the chips to fit it all in. 13:52:42 Then I have to draw the schematics and lay out the board. 13:52:45 THEN I have to cost the board. 13:53:27 That's an awful lot of work to solve a "What if?" question. 13:53:32 indeed 13:53:39 well i have looked at your document 13:54:02 about the fts1002 13:54:07 * kc5tja nods 13:54:17 well the registers are all 8 bit? 13:54:30 sorry 16 bit 13:54:33 sorry read to fast 13:54:34 All 16-bit, but on some of them, there are a lot of unimplemented bits. 13:54:38 okay 13:55:03 ROMMAP, IOMAP, BADADR, and BADCTL are the only registers that have a full 16 bits in them. 13:55:08 well every bit in every register are going to cost an macrocell 13:55:23 Right. 13:55:28 That much I figured. 13:56:02 the demultiplexing and storing result also several 13:56:22 IOBANK, NMICTL, IRQCTL, and ABTCTL are all 8-bits wide. So there is 64 + 32 = 96 bits of total storage. 13:56:57 Right. 13:57:17 So there is no way to store this thing in an 84-pin device, which is what I was hoping to use. 13:57:32 well there is an 108 macrocell cpld 13:57:32 from xilinx 13:57:37 dont know other manufacturers 13:57:41 Oh, wait -- I know Cypress has a few 128 macrocell CPLDs that fit in 84 pins... 13:57:43 plcc84 13:58:10 In their Flash370i series. 13:58:25 how much do they cost? 13:58:32 I haven't checked yet. 13:58:37 I just know the devices exist. 13:58:45 hmm, the xilinx site is down so i cant give you an price of the 108 cell device 14:00:42 Cypress prefers that I buy from a distributor anyway. 14:00:51 btw, how do you use the cypress cpld's? what programmer/software? 14:00:58 Unfortunately, the distributors they list on their site don't know a chip from a Dorito. 14:01:17 well xilinx has an online shop. quite cheap only costly delivery 14:01:33 oh wait in the usa it was quite cheap delivery (compared to world wide) 14:01:48 BoomBoX: They sell a product called Warp!, costing around US$99 or so, which programs most of the low- and mid-grade CPLDs. 14:02:18 It takes both Verilog and VHDL, provides simulation too (which Xilinx's offering fails to deliver). 14:02:20 ah i see. 14:02:31 And WebPACK -- I don't like and refuse to use anything that has the name "Web" in it. 14:02:48 well xilinx offers an third party simulator on their site (its free) 14:02:53 well. its not that bad :) 14:03:01 Last I checked, it involved sending my designs over the web to Xilinx, where they did something to it, then sent me back the resulting programmer file. 14:03:04 No thanks. 14:03:48 I don't like the idea of them taking my designs in any form. My designs are proprietary to me. 14:04:05 ??? well, i have developed several things in verilog for CPLD's, but i never had to do that 14:04:36 biggest advantage of xilinx is that the programmer schematics are online for free 14:04:53 I think fpgas4fun.com has a link to Xilinx's free ISE implementation that you can download. 14:05:12 in my opinion, it cost me several hours and around 20 euro's to get the first counter example working 14:05:27 yeah i know, that is the site that enspired me to start with programmable logic 14:05:49 So then I'm confused: how does WebPACK distinct from the Free version of ISE? 14:06:12 they are the same 14:06:13 s/does/is/ 14:06:46 there is no "Free" version of webpack, the only cost free version is webpack 14:07:11 I didn't say there was a free version of webpack. 14:07:19 I asked about the free version of ISE. :) 14:07:38 well there is an student edition, but that one is only delivered with some books 14:07:53