00:00:00 --- log: started forth/04.04.04
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00:23:43 <thin> hi imaginator
00:23:56 <imaginator> hi
00:24:41 <thin> what have you imagined lately?
00:24:47 <thin> has it been forth stuff?
00:25:44 <imaginator> yes
00:25:59 <imaginator> I've mostly been reading.
00:26:23 <imaginator> And watching videos from MIT (SICP), and interviews with Jeff Fox and Charles Moore.
00:26:49 <thin> ah nice
00:26:58 <thin> good stuff
00:27:38 <thin> the colorforth stuff on UT is great stuff
00:30:38 <imaginator> I haven't gotten to that yet.
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00:34:41 <imaginator> thin: what Forth do you use?
00:35:43 <thin> i like pygmyforth for dos
00:35:54 <thin> colorforth too
00:35:59 <thin> isforth for linux
00:41:42 <imaginator> I haven't been able to run isforth yet.
00:45:05 <imaginator> I tried to help the guy that wrote isforth make it run under emulation in NetBSD, but it didn't work.
00:50:42 <thin> ah
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07:12:46 <GtD> hi folks
07:13:03 <GtD> this is SergPenguin, from friend's account
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09:49:58 <kc5tja> Off to get food.
09:50:08 * kc5tja just finished documenting the transmit aspect of the transmitter.
09:50:30 <Robert> What transmitter?
09:50:31 * kc5tja will be working on the receiver after I get back.
09:50:39 <Robert> Well, you can tell me later.
09:50:47 <kc5tja> Robert: The Kestrel's internal UART (RS-232) support.
09:50:51 <Robert> Ah.
09:51:13 * kc5tja will also be releasing the UART design as a separate chip too, the FB1001.
09:51:30 <Robert> I just had a short QSO with a friend in another part of the country, SSB was too weak but CW worked fine... if only he knew morse code.
09:51:37 <kc5tja> Basically, the FB10xx series will be dedicated to 65xx-series support chips.
09:51:47 <kc5tja> Hee
09:51:53 <kc5tja> hehe rather.  :)
09:51:55 <qFox> its almost 7pm here :p
09:52:00 <qFox> but goodnight
09:52:00 <kc5tja> CW is like that.  That's why I like CW so much.
09:52:27 <Robert> Yeah. My 5W and noisy surroundings wouldn't allow me to have many SSB QSOs.
09:52:31 <kc5tja> qFox: Goodnight, in the same sense as good morning, or goodnight as in the sense of going to bed?  :)
09:53:03 <qFox> as in, you were going to sleep 3 minutes ago ;)
09:53:11 <kc5tja> Robert: Who knows -- maybe someday we can QSO.
09:53:21 <kc5tja> qFox: I was?
09:53:29 <Robert> kc5tja: Probably not, but we could always hope. ;)
09:53:30 <qFox> oh
09:53:32 <qFox> wow 
09:53:39 <qFox> scary
09:53:43 <qFox> i did read bed there :\
09:53:50 <kc5tja> Robert: You'll never know.  QRP can be magical sometimes.
09:53:55 <kc5tja> hehe :D
09:54:12 <Robert> Yeah, maybe if I fix this noise problem.
09:54:25 <kc5tja> Anyway, I'm hungry, it's a nice day out, and I have the day totally and 100% *off*, so I'm going to ride my bike to the local Carl's Jr., and order myself a huge-ass burger.  :D
09:54:29 <Robert> Like I said, people who give me 599s are often at the noise level.
09:54:36 <Robert> Hehe, enjoy!
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09:55:17 <kc5tja> Robert: Yeah, I was listening to someone calling CQ CONTEST yesterday via SSB, and the friggin' idiot behind the mic gave a 599 report, after having to ask for the other guy's callsign *7* (yes, that's SEVEN) times!!
09:55:26 <kc5tja> Anyway, I'm outta here.
09:55:30 <kc5tja> back in a bit.
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10:03:04 <Robert> Haha
10:03:19 <Robert> Hi I440r 
10:03:29 <I440r> hi
10:03:48 * chandler proposes they add an etiquitte test to get licensed
10:04:32 <chandler> "When you have to ask for a callsign seven times, what is the appropriate signal report to give?"
10:04:40 <Robert> 59! 59!
10:05:05 <chandler> "If you can hear only one half of a conversation, is the appropriate response to (a) find another frequency, or (b) assume the other guy is dropping acid and start screaming CQ at 250W?"
10:05:43 <Robert> Haha
10:06:37 <Robert> I think I'll go whisper a 5 watt CQ.
10:06:47 <I440r> whats a cq ????
10:06:48 <I440r> heh
10:07:23 <Robert> "Seek you".. you want to find a chatmate ;)
10:07:31 <hovil> signal check or similar 'anyone out there?'
10:07:40 <I440r> duh
10:07:49 <I440r> so "i" cq didnt invent that L:/
10:08:48 <Robert> Nah
10:08:53 <Robert> Hehe
10:09:14 <tathi> huh
10:09:37 <tathi> That's not actually where it comes from...is it?
10:10:46 <tathi> Hmm.  Guess it is.  Wonder why I never realized that?
10:13:13 <I440r> ok, time to go drive 289765784297854972649528746952 or so miles....
10:13:20 <I440r> l8er :)
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10:55:29 <qFox> BANZAAAAAAIIIII
10:55:46 <qFox> i wonder why my ret is jumping to a part of the code thats unused..
10:56:38 <kc5tja> Back
11:25:23 <qFox> kc5tja> how does the p21 deal with input (keyboard) and output (screen)?
11:27:52 <kc5tja> The same way every other CPU does; it accesses special memory locations which the rest of the computer understands to be input/output ports.
11:28:09 <qFox> ok
11:28:22 <thin> what do you guys think, should i get forthology.com  or fdev.org ?
11:28:28 <thin> what do you like better ?
11:28:34 <kc5tja> Well, the P21 has an integrated video display controller too, but you get the idea.  
11:28:38 <qFox> first one
11:28:41 <qFox> kc5tja> ya
11:29:00 <kc5tja> thin: forthology.com works I guess.
11:29:03 <qFox> i'll probably have to alter the bootcode slightly in order to actually work on a real p24, if i would
11:29:22 <qFox> would it be hard to get my hands on a working p24?
11:30:08 <thin> kc5tja: you guess? that doesn't sound good ^^;
11:30:27 <thin> btw, thats the first time i've ever done an anime-style emoticon!
11:30:27 <thin> heh
11:30:58 <Herkamire> I like forthology.com
11:31:07 <thin> ok :)
11:31:42 <madgarden> TEH FROTHOLOGY!!!1
11:32:01 <qFox> [20:31:50] * Now talking in #forthology
11:32:01 <qFox> [20:31:50] * orwell.freenode.net sets mode: +n
11:32:04 <qFox> muh empty :p
11:32:13 <thin> haha
11:32:56 <Herkamire> or forthology.org
11:33:09 <Herkamire> google gets a lot of results for fdev
11:33:18 <Herkamire> fdev.com seems to be a long distance phone company
11:33:26 <madgarden> No results for forthology, I checked last night.
11:33:57 <qFox> go with forthology, has a better sound to it imo
11:34:01 <qFox> then fdef
11:34:03 <thin> yeah cool
11:34:07 <madgarden> XD
11:34:09 <thin> ok registering it now :D
11:34:49 <Robert> Ah, the joy of being interrupted by a S9+40dB signal.
11:34:49 <kc5tja> GOOD!  This means I can keep Forthwith as the name of my Forth implementation.  :D
11:35:40 <qFox> i'll call mine qForth, i dont think i have to explain that one ;)
11:36:28 <Herkamire> qforth name is taken
11:36:33 <qFox> NO!
11:36:39 <madgarden> qFoxth
11:36:42 <Robert> Hehe
11:36:49 <Herkamire> go to google before you choose a name
11:36:57 <Herkamire> ... for anything
11:37:03 <qFox> omfg... www.qforth.com is taken
11:37:05 <qFox> oh
11:37:07 <qFox> wait its not
11:37:22 <qFox> jumped the gun :p
11:37:29 <Herkamire> QForth is a small integer Forth for Apple IIe/IIc/IIgs computers.
11:37:42 <qFox> oh phoey apple can piss off ;)
11:38:00 <Herkamire> apple didn't write it
11:38:11 <qFox> its for apple, thassal
11:38:21 <qFox> main website on geocities
11:38:21 <qFox> ie
11:38:22 <qFox> w
11:38:54 <qFox> and the last update 30 march this year... damnit why cant that just be like '95 ;)
11:40:13 <madgarden> How about foxForth
11:40:34 <qFox> guess i'll go with that
11:44:46 <madgarden> I meant, foxForth(tm). Contact me privately for trademark licensing details. ;)
11:46:34 <Herkamire> on a hunch, I've been checking google for forth systems named with one letter followed by "forth"
11:46:44 <Herkamire> I've gotten all the way to R...
11:47:12 <Herkamire> there might not be an rforth but there is aforth bforth cforth dforth eforth fforth gforth hforth iforth...
11:47:22 <thin> lol
11:47:30 <thin> fforth?
11:49:53 <Herkamire> this page mentions fforth: http://www.ultratechnology.com/forml93.html
11:51:03 <qFox> i'm curious
11:51:07 <qFox> what defines a custom forth?
11:51:17 <thin> all forths are custom
11:51:29 <qFox> a forth that has added words to a standard forth? like a fig standard, or ansi
11:51:34 <qFox> or a forth that doesnt hold to any standard?
11:51:42 <qFox> or is it the lowlevel implementation of the forth?
11:51:43 <qFox> or..
11:52:27 <thin> nah i said all forths are custom..  every forth made is unique in some way, even the ones that follow a standard..
11:52:37 <qFox> hm
11:52:42 <qFox> k
11:53:43 <thin> hmm
11:53:49 <thin> now you got me thinking about ansi forth
11:54:00 <qFox> what about it?
11:54:02 <thin> and thinking about "how can i destroy ansi forth and erase it from the memories of everyone?"
11:54:34 <thin> i think ansi forth is largely responsible for killing forth
11:54:38 <qFox> hahahha
11:54:39 <kc5tja> I don't.
11:54:45 <kc5tja> Forth was already dead before ANSI ever came around
11:54:51 <thin> the standard emphasizes all the weaknesses of forth and none of its strenghts
11:55:11 <kc5tja> I also disagree with that.  What evidence can you cite to justify your claim?
11:56:28 <qFox> so what can we do to revive it?
11:56:29 <qFox> :)
11:56:48 <kc5tja> I am no fan of ANSI Forth myself, but please, don't do it a total disservice.  It has a place in this world, there was a need for it, and it forms the foundation of two very successful industry standards: OpenFirmware and the smart-card technology used in Europe (I forget the name of it).
11:56:59 <kc5tja> One need only *use* it to revive it.
11:57:10 <kc5tja> Write *compelling* applications in it.
11:57:26 <kc5tja> Most people won't care what language a tool is written in.
11:57:27 <qFox> the _only_ and first time i ever heard about forth, was just before i joined here for the first time
11:57:28 <qFox> on #ai
11:57:34 <qFox> because ree mentioned it
11:58:00 <kc5tja> But when someone wants to modify it, they'll find it's written in Forth, then they'll either have to learn Forth to modify it, or re-write the WHOLE app in C or whatever, and usually will fail miserably at it.
11:59:10 * kc5tja has considered writing a PalmOS-like environment for the Kestrel.
11:59:17 <kc5tja> Complete with some basic productivity applications.
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11:59:20 <kc5tja> All written in Forth.
11:59:22 <qFox> palmos?
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11:59:38 <kc5tja> qFox: Please tell me you've at least heard of the Palm Pilot.....
11:59:43 <qFox> yes i know what it is
11:59:51 <kc5tja> PalmOS is its operating system.
11:59:57 <qFox> but i mean, how do you relate it to the kestrel?
12:00:13 <kc5tja> Umm...i think I just explained that.
12:00:16 <qFox> is the kestrel going to be a handheld? :D
12:00:21 <kc5tja> No.
12:00:25 <qFox> ahw :)
12:01:03 <kc5tja> Although a future PDA isn't out of the question, *IF* manufacturing costs can be reasonable.  Custom injection-molded plastic cases are DAMN expensive!!
12:01:13 <qFox> :)
12:01:30 <thin> so don't use custom ones :P
12:01:35 <kc5tja> Maybe a tablet PC form factor; that'd be easier to do.
12:01:41 <kc5tja> thin: There are *ONLY* custom ones.
12:02:18 <thin> i mean find some cases that you like then talk to the company that is buying them in bulk..
12:02:42 <kc5tja> thin: You misunderstand.
12:02:49 <kc5tja> thin: Custom cases are *ALL* that's available.
12:02:50 <kc5tja> Period.
12:02:56 <kc5tja> There are no standards for PDAs.
12:02:57 <kc5tja> None.
12:02:58 <kc5tja> Zero.
12:03:00 <kc5tja> Nada.
12:03:27 <kc5tja> Every PDA has a different form factor.  Each even has a custom-made LCD screen just to fit the PDA it's mounted in.
12:03:51 <thin> there are companies that sell PDAs right?
12:04:07 <thin> you look at those companies selling PDAs
12:04:11 <qFox> isnt it possible to modify a pda?
12:04:13 <thin> and if you see that one of them has a nice case
12:04:20 <thin> then you talk to them and ask to purchase some cases off them
12:04:22 <qFox> i havent had much experience with pda's
12:04:29 <thin> at savings cuz they to mass bulk purchases..
12:04:44 <kc5tja> thin: I doubt that would ever work.
12:05:16 <kc5tja> Remember too: first, I'll be competing with their product line, and second, *MY* volumes will be substantially lower than their products.  Both count against me in securing such a deal.
12:07:12 <kc5tja> Such a kit would also be a VERY advanced kit.
12:07:57 <kc5tja> Literally everything would be surface mount, including individual resistors and capacitors (which, BTW, are no larger than the *edge* of a coin).
12:08:28 <thin> edge of a dime or a penny? ;)
12:08:32 <kc5tja> To get good densities on the printed circuit board, we're looking at four or more PCB layers too, which doubles PC board costs.
12:08:38 <thin> j/k
12:08:51 <kc5tja> thin: For some, it's a dime.  Others are typically about the size of a quarter.
12:09:14 <qFox> kc5tja> if, in the registers, you add x to y, and it produces a carry, does the carry mean the sign is flipped? (the most significant bit)
12:09:16 <kc5tja> Obviously, for sake of human spirit, I'd choose the larger sizes.
12:09:46 <kc5tja> qFox: More info please?
12:09:51 <qFox> well
12:10:11 <kc5tja> qFox: The carry is just the (n+1)th bit of the result.  That's it.  
12:10:14 <qFox> say you have 4bit registers, you add 1011 to 1100, what would be the result in teh register?
12:10:23 <kc5tja> So if you're adding two 16-bit numbers, then the carry is the 17th bit.  That's it.
12:11:16 <qFox> oh um, duh
12:11:22 <kc5tja> :)
12:11:23 <qFox> the sign automaticly gets flipped
12:11:27 <qFox> right
12:11:40 <kc5tja> Well, 
12:11:45 <kc5tja> depends on how you're interpreting the data.
12:11:48 <qFox> or that is the result anyways
12:11:53 <qFox> yes i understand
12:11:54 <qFox> tnx :)
12:13:06 --- nick: tathi_ -> tathi
12:13:28 <kc5tja> Maybe that's what I should do for the Kestrel's design: build a simple 8-bit MISC chip (yes, 8-bit) to serve as the core CPU, since the 65816 is too hard for me to emulate in software with my level of patience.
12:13:40 <qFox> hehe
12:13:41 <kc5tja> Base it on the Steamer 16's instruction set.
12:13:57 <kc5tja> So it'd have 3 instructions packed in a single byte (two full 3-bit opcodes, plus one 2-bit opcode).
12:14:00 <qFox> how many instructions will the cpu have btw?
12:14:08 <kc5tja> There'd be just 8 instructions.
12:14:09 <qFox> the kestrel i mean
12:14:12 <qFox> 8?
12:14:28 <kc5tja> qFox: The 65816 has 92 instructions, and lots of addressing modes.
12:14:32 <qFox> ah okay
12:14:36 <qFox> scared me there :p
12:15:05 <kc5tja> Don't be scared; what should scare you is the fact that the Steamer 16, with its meager 8 instructions, can literally blow a similarly clocked 80386 clean out of the water.
12:15:23 <qFox> that doesnt scare me much
12:15:42 <qFox> but the p24 has 28 instructions. sure i could eliminate a few more
12:15:48 <kc5tja> Well, here we have a CPU that has 8 instructions, and it rocks the house of the 80386, with its 500+ instructions.
12:15:53 <qFox> but i couldnt get down to 8, i dont think i can...
12:16:05 <qFox> and have the same possibilities i mean
12:16:18 <kc5tja> NOP, LDI, FETCH, STORE, ADD, AND, XOR, JZ
12:16:38 <qFox> thats not a stack cpu then?
12:16:41 <kc5tja> it is.
12:16:44 <kc5tja> But it's not a Forth CPU.
12:16:47 <qFox> right
12:16:53 <qFox> how do you push/pop?
12:16:55 <kc5tja> It has an internal 3-deep data stack and that's it.
12:17:21 <kc5tja> Push/pop what?
12:17:25 <kc5tja> And to/from where?
12:17:36 <qFox> hmmm registers?
12:17:40 <kc5tja> None.
12:17:41 <qFox> to save them temp
12:17:51 <kc5tja> You have the 3 data stack "registers," and the program counter.  That's it.
12:17:54 <qFox> so you'd have to store the register in the mem first, then whatever
12:18:01 <qFox> hm k
12:18:21 <kc5tja> it's closer in programming style to an accumulator-based CPU than a stack CPU.
12:18:41 <kc5tja> E.g., the equivalent code to MOV AL,[BX+50] (in x86 assembly language) is this:
12:18:44 <kc5tja> LDI 50
12:18:49 <kc5tja> LDI address_of_BX
12:18:50 <kc5tja> FETCH
12:18:51 <kc5tja> ADD
12:18:57 <kc5tja> LDI address_of_AL
12:19:01 <kc5tja> FETCH
12:19:02 <kc5tja> STORE
12:19:18 <kc5tja> (oops, I got the order of the stack elements mixed up, but you get the idea; same number of instructions)
12:19:25 <qFox> ye i figured it should be possible to emulate mul and div, but how do you test for a certain bit to be one or zero? xor?
12:19:31 <qFox> uhm, AND i mean
12:19:44 <kc5tja> AND and XOR both, depending on what you're testing.
12:19:49 <kc5tja> AND is good for testing to see if a bit is set.
12:19:50 <qFox> hm ye ok
12:19:59 <kc5tja> XOR is good for testing to see if a bit is as-expected.
12:20:16 <kc5tja> AND followed by XOR is good for testing to see if a bit is clear.
12:21:52 <kc5tja> Anyway, this kind of "chip" would be good for simulating the Kestrel as-a-system.  Even though the real hardware will use a 65816, the Steamer16 instruction set is WAY easier to write a simulator for.
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12:24:00 <thin> does anybody know "zardon"
12:24:04 <thin> some forther that came here ??
12:24:06 <thin> i mean
12:24:09 <kc5tja> Nope.
12:24:11 <thin> has anyone seen a "zardon" come here?
12:24:16 <thin> cuz he registered on the forums..
12:24:20 <kc5tja> I know he used to show up in the past, but haven't seen him around in awhile.
12:24:24 <thin> ah
12:24:26 <thin> ok i never saw him
12:24:37 <qFox> hm that name sounds very familiar to me
12:27:29 <kc5tja> OK, sweet!  I just found a 6502 Verilog core on the net!
12:27:35 <kc5tja> I could just use that!
12:29:42 <qFox> hm, in practice, how hard would it be to reprogram the bootstrap of an old laptop (200mhz) so it'll boot in forth? :)
12:30:30 <qFox> toshiba satilite pro :p
12:30:47 <Herkamire> kc5tja: (I was just reading the backlog about a possible kestrel-like PDA) you should make a case by dipping the whole thing in that rubber that they use on the handles of pliers.
12:31:05 <thin> qfox: should be doable..
12:31:15 <thin> qfox: are you talking about reprogramming the bios ?
12:31:19 <qFox> i guess
12:31:20 <thin> is it flashable?
12:31:30 <qFox> no idea
12:31:47 <kc5tja> Herkamire: It's not reliable.  For starters, the pc board will still be "exposed" in the sense that it can snap in two very easily.
12:32:00 <kc5tja> And how would you change the batteries?  :)
12:32:04 <thin> well when you boot up the laptop hit pause and write down all the info
12:32:12 <kc5tja> The LCD panel still needs something to mount on to as well.
12:32:14 <thin> like the bios name, type, etc.. then you can look it up on the net
12:32:17 <Herkamire> you could cut a flap for the batery case, and cut out a square for the screen
12:32:18 <qFox> hm k
12:32:23 <Herkamire> and buttons
12:32:52 <Herkamire> pc boards are fragile? aren't we talking about those indestructable green things in VCRs etc?
12:33:05 <kc5tja> Herkamire: PC boards are very fragile.
12:33:35 <kc5tja> Ever try to insert a PCI card in a virgin slot?  Watch what happens to the motherboard of the computer.  :D
12:33:51 <thin> what happens to the mobo?
12:34:13 <kc5tja> thin: Most PC boards will flex like a yoga practitioner.
12:34:17 <thin> i'm very rough with putting in pci cards etc
12:34:28 <thin> mostly because i saw experienced computer technicians being rough
12:34:31 <Herkamire> yeah, but they don't break
12:34:38 <thin> so i figure i can handle the stuff the same way they do
12:34:42 <kc5tja> I don't know.
12:35:02 <kc5tja> I just don't like the idea of flexing the PCB with a bunch of soldered components on it.  Things tend to break after repeated flexures.
12:35:42 <Herkamire> if anybody twists a pda as hard as you have to push to get a pci card in, a bunch of times, they deserve to break it
12:36:20 <qFox> My impressions of the Toshiba Satellite Pro 480CDT. UPDATE March 24, 2003. ... I got a Toshiba Satellite Pro 480CDT on January 19, 1998. It was my first laptop. ... 
12:36:22 <qFox> heh
12:36:24 <qFox> this thing is old
12:36:37 <thin> heh
12:36:52 <kc5tja> I got one older than that: A Satellite 210T -- not even a Pro.  :)
12:36:52 <qFox> http://www.math.umaine.edu/faculty/hiebeler/480cdt.html
12:36:53 <thin> is that a 486?
12:36:58 <qFox> no its pentium!
12:37:05 <thin> wow
12:37:11 <qFox> This machine has a 233MHZ Tillamook, 10X CDROM, FDD, built-in 33.6 Kbps modem with standard RJ-11 jack and a cellular-phone cable port, 32MB memory, 3.8GB hard disk, 256K L2 cache, 2MB video memory, 12.1-inch screen, Yamaha OPL3-SA3 sound card, Accu-point "eraser head" pointing device. There's a serial port, parallel port, USB port, 4Mbps IrDA port, NoteDock port, microphone jack, headphone jack, line-in jack, external SVGA monitor port, PS/2 port 
12:37:25 <kc5tja> Mine is a 80486DX processor running at the breakneck speed of 33MHz, with 8MB of RAM, and a monsterous 200MB harddrive!!
12:37:36 <qFox> :D
12:37:42 <qFox> hey
12:37:42 <qFox> wait
12:37:44 <qFox> 3.8?
12:37:46 <qFox> they ripped me
12:37:49 <qFox> mines about 1gig :(
12:38:10 <thin> back in grade 9 when i first started getting onto the net i borrowed a laptop from my mom's college, a 486, black & white laptop..  i had it in a closet and sat on a chair in front of the closet and leaned my head on one of the shelves sticking out
12:38:18 <thin> so eventually i had a callus on the middle of my head
12:38:19 <qFox> 1.3
12:38:19 <kc5tja> qFox: I wouldn't complain -- at least your harddrive is big enough to put Linux on!
12:38:19 <qFox> :(
12:38:21 <thin> forehead
12:38:26 <qFox> i guess
12:38:36 <thin> i was proud of that callous on my forehead!
12:38:46 <qFox> it has 98se though :p
12:39:07 <kc5tja> Mine came with Windows 3.1 (WoOHOO!), which I promptly removed immediately, and re-installed DOS 6.22 on it.
12:39:11 <thin> 1 gig is huge for linux
12:39:26 <kc5tja> thin: Not exactly.
12:39:35 <kc5tja> Or, I should say, not anymore.
12:40:14 <thin> yeah
12:40:17 <thin> well for oldstyle linux
12:40:18 <kc5tja> More than half of my installed applications are console applications, yet my 18GB partition is down to 5.7GB.
12:40:32 <thin> like a 1996 linux cd ;)
12:40:48 <kc5tja> And all total, my multimedia files only amount to about 3GB, so it's not the only cause.
12:41:22 <kc5tja> thin: Well, base install of Linux can be pretty small.  slackware *still* fits on only one CD, for example.
12:41:22 <qFox> hm pesky things about laptop is the lack of a hard power switch
12:41:35 <thin> i have windows and all my programs installed on a 1 gig partition, and a 38 gig partition for my data
12:41:37 <qFox> right now it wont fucking reboot, its stuck waiting for the system to shutdown :(
12:41:39 <thin> :P
12:41:50 <qFox> that'll take me an hour or two to drain the full battery :(
12:42:05 <thin> qfox: huh? hit the power button?
12:42:13 <qFox> wont work
12:42:18 <qFox> doesnt.
12:42:20 <kc5tja> qFox: Press and hold the power switch for about 45 seconds.  The motherboard, to be ATX compliant, is required to *forcefully* turn off the computer if that happens.
12:42:27 <qFox> 45?
12:42:32 <qFox> pffff what happened to 6? :)
12:42:37 <kc5tja> It never was six.
12:42:46 <kc5tja> That was the grace of the mobo vendors.
12:42:57 <kc5tja> ATX doesn't set the minimum time.  Only the maximum time.
12:42:57 <qFox> workede
12:43:00 <qFox> i think
12:43:03 <kc5tja> I've seen mobos that wait up to 30 seconds.
12:43:20 <qFox> um
12:43:23 <qFox> it didnt work
12:43:24 <qFox> :)
12:43:24 <thin> you learn something everyday at #forth! ;)
12:43:28 <qFox> it turned off the screen
12:43:28 <thin> dang
12:43:39 <qFox> but when i turned it on it showed me the same screen again :s
12:44:02 <kc5tja> qFox: Then yank the power cord or battery.  Although, MY laptop has a reset button on the front panel of the laptop.  Yours ought to as well.
12:44:25 <kc5tja> You'll probably need a paperclip or ballpoint pen to hit it though.
12:44:56 <qFox> hm
12:46:06 <qFox> well it has ir, usb, some plug i dont recognize
12:46:13 <qFox> but cant find such a reset
12:46:49 <qFox> found it! sneakily hidden
12:46:56 <qFox> now for that paperclip...
12:47:51 <qFox> yay
12:48:02 <qFox> now how i can get in the bios... how do you bypass those old bootscreens?
12:48:44 <thin> no i meant write down the stuff you see on the bootup screen..
12:49:03 <thin> like does it saw Award BIOS etc
12:49:11 <qFox> del doesnt work
12:49:15 <qFox> f1, esc neither
12:49:34 <qFox> and there's no text as the toshiba bootscreen hides that stuff
12:49:55 <thin> um is there two bootscreens?
12:50:07 <thin> like if you wait for the initial bootscreen to go away you'll see another one..
12:50:26 <qFox> nop
12:50:32 <kc5tja> thin: The Toshiba laptops are world famous for their BIOS implementations.
12:50:45 <qFox> first screen after the booscreen is windows (or the menu to go to alternative boot options for windows if you press f7)
12:50:48 <kc5tja> I haven't ever succeeded in getting into my BIOS configuration screen since getting my laptop.
12:50:54 <qFox> you havent?
12:50:54 <qFox> damnit
12:50:56 <thin> haha :)
12:50:56 <qFox> :(
12:51:05 <thin> you don't need to anyways
12:51:09 <qFox> i want to!
12:51:19 <qFox> does the bios even have a gui?
12:51:21 <thin> just figure out the year of the toshiba laptop etc and try to find out if its flashable?
12:52:48 <qFox> kc5tja> http://uk.computers.toshiba-europe.com/cgi-bin/ToshibaCSG/faq.jsp?z=16&service=UK&FID=0000000401 ^^
12:52:52 * qFox tries
12:55:52 <kc5tja> Son of a gun!!!
12:56:02 <qFox> nah, it doesnt even work for me :(
12:56:08 <qFox> well the first two
12:56:13 * kc5tja goes to try it on his laptop.
12:56:23 <kc5tja> Well, actually, I'll try it later.
12:56:24 <thin> try what?
12:56:25 <qFox> btw... google is your friend
12:56:28 <qFox> ;)
12:56:34 * kc5tja has some work to do first.
12:56:48 <thin> qfox: yeah keep googling until you find the answers!
13:04:11 <qFox> well
13:04:16 <qFox> seems like toshiba wins
13:04:26 <qFox> procedure doesnt work
13:15:41 --- quit: wossname ("0")
13:22:18 <kc5tja> Boy, this kind of sucks.  I've only found *one* 6502 Verilog implementation.
13:22:23 <kc5tja> The rest are *all* in VHDL.
13:22:26 <kc5tja> >:/
13:22:59 <thin> so get vhdl :P
13:23:13 <kc5tja> That doesn't solve my problem.
13:23:33 <thin> because you are looking for implementations ?
13:23:40 <kc5tja> The next step is getting VHDL and Verilog to talk to each other; as far as I know, there is no standard for getting them to work together.
13:23:43 <qFox> you have a attitude problem sir. its not a problem, its a challange!
13:23:44 <qFox> :p
13:23:45 <kc5tja> No.  Behavioral model is sufficient.
13:24:09 <kc5tja> I already have the 65816 hardware chips; I just want the behavioral model so I can write software and test it entirely in the hardware simulator, complete with custom chips.
13:24:12 <qFox> hm ok that looks better in dutch :)
13:24:34 <kc5tja> qFox: It makes sense, and I know what you're trying to say.
13:24:41 <qFox> k :)
13:25:32 <kc5tja> But it doesn't change the basic crux of the problem: besides there not being a free VHDL simulator for Linux, even if there were one, one would need interface it to the Verilog simulator to get the "chips" talking to each other.
13:26:11 <thin> do you want OKAD?
13:26:12 <thin> heh
13:26:36 <thin> i'll hax0r chuck for his OKAD, muwahaha!
13:27:28 <kc5tja> No.
14:21:22 --- join: ianp (~ian@c-24-13-102-246.client.comcast.net) joined #forth
14:22:51 <thin> well i've registered forthology.com
14:22:56 <madgarden> ianp, did you just join #forth, or did #forth join you? Hmm...
14:23:11 <thin> now gotta wait 48 hours for it to propagate
14:23:13 <thin> maybe a little less
14:23:30 <madgarden> .com eh?
14:23:42 <thin> yeah
14:23:44 <thin> why not?
14:25:10 <madgarden> .org, .com, it matters not.
14:26:23 * kc5tja just received quite a strong request from an individual on the 6502.org forum for new chips.
14:26:41 <kc5tja> A chip to handle the bus demultiplexing for the 65816, a floppy disk controller, a video chip, a sound chip, . . .
14:27:04 <madgarden> So he's providing the venture capital then? :D
14:27:17 <kc5tja> No, but it is a good market indicator.
14:27:37 <kc5tja> And remember my 65816-powered asynchronous bus interface that I was going on about earlier?
14:28:02 <kc5tja> Well, it turns out that the basic bus interface is already design and fully specified: it's called WISHBONE, and it's used to interconnect different cores on a single FPGA chip.
14:28:53 <kc5tja> The *only* differences between WISHBONE and my bus is that my clock, strobe, and acknowledgement pins are negative mirrors of each other: e.g., WISHBONE uses all active-high signals, while I use all active-low.
14:29:55 <thin> for what kind of chips? forthchips?
14:29:59 <kc5tja> Anything.
14:30:02 <kc5tja> It's a bus.
14:30:02 <thin> are you making a chip?
14:30:09 <thin> ok so its a non-cpu chip?
14:30:13 <kc5tja> thin: CPLD or FPGA.
14:30:21 <kc5tja> thin: What are you talking about?
14:30:37 <kc5tja> WISHBONE is a *bus*.  It's used to interconnect chips, it isn't a chip in and of itself.
14:31:03 <thin> nevermind, when i hear "chip" i tend to think "cpu"
14:31:04 <thin> heh
14:31:16 <kc5tja> And it's quite possible to have a CPU with a native WISHBONE interface.
14:31:19 <thin> so i thought this guy from 6052.org was talking about a cpu
14:31:22 <kc5tja> The 6502 *almost* has one itself.
14:31:36 <kc5tja> I can make the 65816 totally WISHBONE compatible with only a handful of gates.
14:31:54 <thin> so what does the 6052.org guy want? a cpu chip or some other chip? whats the chip supposed to do..
14:31:59 <kc5tja> <kc5tja> A chip to handle the bus demultiplexing for the 65816, a floppy disk controller, a video chip, a sound chip, . . .
14:32:11 <thin> yeah ok
14:32:37 <thin> heh my reading comprehension tends to take a hit when i use irc clients thru shell
14:32:42 <thin> like ircii, irssi, etc..
14:33:13 <thin> cuz the window is so small :P..  i should fix that
14:33:30 <kc5tja> Well, you also have to follow the thread of the conversation too.  :)
14:34:56 <kc5tja> The thing is, I won't be able to support myself on chip sales alone.
14:35:12 <kc5tja> Each chip will likely go for around $25 or so; that covers the cost of the chip, plus some small profit.
14:35:14 <thin> yeah but its an addition to K isn't it?
14:35:18 <thin> hmm cool
14:35:31 <thin> so you are going to design this chip and use it for K plus sell it separately too?
14:35:43 <thin> profit is peaking at you from every corner you look ;)
14:35:43 <kc5tja> Yes, I was getting to that; the relationship to the Kestrel is intriguing: the chip sales support the Kestrel, the Kestrel sales support the chips, and both support me.
14:35:52 <kc5tja> I can see why Commodore insisted on developing and using all of its own chips.
14:35:55 <kc5tja> It was *damn* smart.
14:36:02 <thin> sweet :D
14:36:15 <thin> and you're just the guy to design chips ain't ya?
14:36:22 <thin> with all your experience from that chip company you worked for
14:36:28 <kc5tja> It's what I consider myself good at (digital design in general)
14:36:36 <kc5tja> You mean, zero experience?  :)
14:36:46 <kc5tja> I never designed chips; I only tested them after silicon was returned.
14:37:03 <thin> yeah.. but you got some exposure to the technology, terminology, etc
14:37:04 <kc5tja> This is a whole new role for me, as "VLSI Engineer."  (hehe -- sounds funny.)
14:37:12 <kc5tja> Yes.  I suppose I did.
14:37:25 <kc5tja> And, unlike Hifn, my designs are *ENGINEERED FOR TESTABILITY* goddammit.
14:39:21 <kc5tja> I've already named the family for the 65x-series support chips.
14:39:28 <kc5tja> FTS10xx
14:39:52 <kc5tja> With the FTS1001 possibly containing Kestrel's UART, one timer (to set the baud rate), and some customized interrupt control logic.
14:42:04 <thin> :)
14:42:19 <thin> it all sounds like lots of fun :D
14:42:35 <kc5tja> And since the timer is required, that means a whole separate core, and therefore, unsurprisingly, the FTS1002 (programmable interval timer) will likely be co-released at the same time.
14:44:42 <thin> i hope you are using the best possible tools & finding the best possible methods w/ designing these chips
14:48:06 <kc5tja> Well, it is very, very important to understand that I'm using only behavioral models right now.
14:48:10 <kc5tja> These are NOT synthesizable.
14:48:30 <kc5tja> Synthesis to specific chips requires specific compilers and tools.
14:49:09 <kc5tja> One of the reasons I was looking for the Verilog CPU module is, quite simply, to model the *whole* Kestrel design *entirely* in Verilog, before I even commit to a specific chip vendor.
14:49:29 <kc5tja> For instance, I can implement my UART design in almost any CPLD device.  It's that simple.
14:49:51 <thin> ok cool
14:49:57 <kc5tja> Likewise with most of the other discrete components in the FTS10xx series.
14:50:26 <kc5tja> But combining MULTIPLE cores into a single chip will almost certainly require an FPGA, which might require changes to the Verilog code to make it synthesizable in that technology.
14:51:58 <kc5tja> Also, the MISC core that I intend on developing will almost certainly start off synchronous, but in the subsequent processor generation, it'll be asynchronous.  This way, I can get something on the market right away.
14:52:12 <kc5tja> But that's for the Raven designs, not the Kestrel.
14:52:18 <kc5tja> I need to concentrate on kestrel's peripherals first.
14:53:03 <kc5tja> I'm also thinking of putting my Peripheral Interconnect Bus into the public domain, just like WISHBONE is.  >:)  I am most evil.  That will probably and hopefully squash my commercial competitors, I2C and SPI.  >:)
14:53:31 <kc5tja> (and it'll literally blow them to shreds, since I have *much* higher data throughputs on average than they do.)
14:54:06 <kc5tja> So, yes, it is quite fun.  But it is also a lot more work than I expected too.
14:56:38 <thin> why start off synchronous?  easier ?
14:56:43 <thin> cheaper?
14:56:55 <kc5tja> Easier.
14:57:00 <kc5tja> Faster to model.
14:57:05 <kc5tja> Uses less gates.
14:57:19 <thin> if you put your PIB into public domain, that will squash I2C and SPI?  then do it! :DDD
14:57:22 <thin> heh
14:57:28 * thin i'm all for destructive innovation
14:57:32 <thin> er
14:57:33 <thin> is
15:00:29 <qFox> kc5tja
15:00:31 <qFox> i haxed it
15:00:32 <qFox> !
15:00:39 <qFox> press and hold escape BEFORE you see the bootlogo
15:00:46 <qFox> then instead of showing the bootlogo
15:00:59 <qFox> it'll show some text, and the msg to press f1 to continue
15:01:03 <qFox> then you're in the bios
15:01:07 <kc5tja> Nice!
15:01:20 <qFox> and i finally managed to turn off that fucking 100 decibell boot beep
15:01:35 <qFox> goddamnit any idea how crazy that beep is when you're sitting in the train?
15:01:47 <qFox> i swear, at that volume, the conductor of the train could hear it... :\
15:02:41 <qFox> i was watching good will hunting, and i figured i might as well fiddle some more with it 
15:02:48 <qFox> pressing random F keys and whatever :p
15:03:07 <qFox> makes nasty beeps when its input buffer is full btw ;)
15:03:33 <kc5tja> Yes, I can't stand the PC speaker.
15:03:47 <qFox> i could stand it, if only you could effectively adjust the volume
15:04:10 <qFox> for some reason, pressing the function-speaker button does not have any effect on the volume (only the soundblaster volume)
15:04:25 <kc5tja> thin: It probably would within the opencores.org community.
15:04:25 <qFox> btw, boot states nothing about speaker volume, so i just turned it off :)
15:04:32 <kc5tja> thin: I doubt it would in the real-world though.
15:04:53 <kc5tja> There is no speaker volume; the PC speaker is either full on or full off.
15:06:05 <qFox> right.... i must've gotten one of the loudest then
15:06:19 <qFox> but if it can generate a low tone when booting
15:06:29 <qFox> why cant it use this tone for the freaking speaker as well :\
15:06:50 <qFox> (the fn + speaker combination generates a tone to indicate the volume you set it to)
15:07:09 --- quit: hovil ("Leaving")
15:10:39 <kc5tja> Hmm...mine doesn't have a volume setting.
15:10:47 <kc5tja> Oh well, I don't know.
15:10:56 <qFox> well it could not be on your lap
15:11:09 <qFox> but you have a fn key (annoyingly at the same place as the windows key normally is...)
15:11:19 <qFox> and the number 4 has a speaker icon on top of it
15:11:29 <qFox> if you press the fn key, and the 4 key, you'll hear a tone
15:11:36 <qFox> (ok might be a different keyboard layout)
15:12:20 <kc5tja> The Kestrel's audio output is wavetable based, and each channel will have its own volume control.
15:12:41 * kc5tja is thinking of having the Kestrel boot up with me saying "Kestrel!".  :)
15:13:15 <kc5tja> It was going to be synthesized, but with the DMA channels, it's way easier (and way less logic) to just use wavetables.
15:13:58 <qFox> heh
15:14:08 <qFox> ohwell
15:14:10 <qFox> nothing on tv
15:14:12 <qFox> nobody online
15:14:15 <qFox> lets continue my bootcode
15:14:21 <kc5tja> It does increase the CPU overhead a bit though.  But the Amiga proved it would work quite well, so, maybe...
15:14:39 <kc5tja> And Kestrel will run faster than a stock Amiga, to boot.
15:14:52 <qFox> hm did you answer my earlier question? about the availability of a working p24?
15:22:30 <thin> kc5tja: i like the bootup saying "kestrel!" idea
15:23:29 <thin> actually i had daydreamed (long ago) that FLOS would have this stunning eye candy movie and an avatar that would talk "welcome to flos!" and show lots of eye candy while installing the os etc
15:23:33 <thin> and it would all be so blazing fast
15:23:40 <thin> even on a 75 mhz pentium
15:24:24 <kc5tja> qfox: I never saw an earlier question pertaining to the availability of the P24.
15:24:38 <qFox> oh
15:24:43 <kc5tja> thin: Hehe :)  I had something more like the Macintosh in mind.  It's more a joke than anything serious.
15:24:48 <qFox> well how hard and expensive would it be to get a working p24?
15:25:14 <thin> qfox: eh ask on CLF, maybe ask jeff fox?
15:25:18 <kc5tja> qFox: You would need to ask Professor Ting about that, since it's his chip.  I know nothing about the current offerings of Offete Enterprises.
15:25:25 <thin> dunno, could be about $50 or so
15:25:29 <thin> i have no idea :P
15:25:31 <thin> making up numbers
15:25:37 <qFox> $50 , would that be complete?
15:25:58 <qFox> or like just the chip, fix the whole thing yourself kinda thing? :)
15:26:04 <kc5tja> thin: That might be about right.  The cost of the FPGA it's programmed into would be in the $20 range, I'd suspect.  Still, a high performance stack CPU might well be worth that cost, especially if it makes system design for other components easier.
15:26:16 <kc5tja> qFox: Just the chip, probably.
15:26:51 <qFox> hm k
15:26:51 <thin> well um, Ignite is $15 for the chip
15:27:16 <kc5tja> thin: Ignite is also an ASIC, custom designed and all that jazz.
15:27:22 <kc5tja> thin: They're also selling in volume.
15:27:27 <thin> What does ASIC mean?
15:27:34 <thin> i emailed patriot and ask them how much for one chip
15:27:34 <kc5tja> Application Specific Integrated Circuit.
15:27:37 <thin> and they told me $15
15:27:52 <thin> asked*
15:28:06 <kc5tja> Well, again, what ultimately determines cost is *volume*.
15:28:49 <kc5tja> When you're selling tens of thousands of chips a year, that's pretty significant.  You can probably charge $15.  When you're selling hundreds of thousands a year, maybe $9.  When you're selling millions, you're looking at charging only $4 a chip, and still raking in the cash.
15:29:10 <kc5tja> Since the P24 is absolutely NOT selling in the millions as far as I know, well, don't cry when you see a $50 chip price-tag.
15:29:30 <thin> yup
15:29:47 <kc5tja> To put things into perspective, Hifn is charged $500K (yes, half a million dollars) *PER CHIP* *PER WAFER RUN*.
15:30:09 <kc5tja> This means, if a bug appears in the chip, that's half a million down the tubes, not counting paychecks and benefits and all that.
15:30:23 <kc5tja> This is why Hifn charges $200 to $400 *per chip*.
15:30:31 <kc5tja> Because they just don't sell en masse like other kinds of chips.
15:30:36 <kc5tja> It's the only way to recoup costs.
15:32:36 <kc5tja> DUDE!!!!!
15:32:41 <kc5tja> I am *SO* in the wrong business!!!!!
15:32:48 <thin> huh?
15:33:15 <kc5tja> Ocean Logic is a company that does nothing BUT produce Verilog and VHDL cores -- guess how much they charge for a one-cycle Huffman encoder/decoder for a one-time license?
15:33:22 <kc5tja> US $10,000!!!
15:33:32 <thin> eww
15:33:48 <thin> do you need that?
15:33:54 <kc5tja> That's like saying, "OK, if you want to use this core, you'll need to hand over two Mazda RX-7s and a new copy of Halflife II."
15:34:13 <thin> heh
15:34:14 <kc5tja> thin: Think, why would I want/need such a device?
15:34:27 <kc5tja> thin: But am I also not producing Verilog cores?
15:35:06 <thin> in this case, does "producing" mean manufacturing?
15:35:31 <kc5tja> I can charge a lot less for my Verilog cores since they're not nearly so specialized.  But still, $250 to $500/license would *ROCK!*
15:35:55 <thin> cool
15:35:59 <kc5tja> thin: In this case, "producing" means (1) editing a bunch of text files to contain a valid, synthesizable core, and (2) e-mailing it to some customer who just sent you a check for $10,000.
15:36:01 <thin> :D
15:36:07 <thin> LOL
15:36:36 <kc5tja> DUDE...I'm *SO* into this business.  I need to start researching how these licenses work.
15:37:41 <kc5tja> But when you're dealing with price tags as high as that, you need some serious legal defenses, I'm sure.
15:38:02 <chandler> does that $10,000 have any other benefits? (like the core has been machine-verified or somesuch)
15:38:21 <kc5tja> That's what synthesizable means.
15:38:40 <kc5tja> Take .v file, compile it with your Verilog synthesis tool, and program chip.  Congrats, you now have a 1-cycle huffman encoder/decoder.
15:38:54 <kc5tja> The timing diagrams are as advertised in the data sheet, programming interface is as advertised, etc.
15:38:59 <chandler> nono, I mean proven correct by computer program
15:39:10 <chandler> via ACL2 or whatever
15:39:10 <kc5tja> chandler: That's Verilog's job.
15:39:14 <qFox> hah lol. i was using swap as an instruction, but its not an instruction
15:39:18 <qFox> damnit :)
15:39:32 <chandler> eh, Verilog proves that the core does indeed do huffman decoding correctly?
15:39:36 <chandler> I guess it's more complex than I thought it was :-)
15:39:39 * chandler has only ever used VHDL
15:39:56 <kc5tja> chandler: Like my UART design, for example, I have two "modules."  The first is the UART transmitter core proper; the second is a test-bench for it that verifies proper operation (think unit testing).
15:40:05 <chandler> unit testing != proof
15:40:16 <chandler> (not to say I don't like or value unit testing)
15:40:18 <kc5tja> Don't start this crap again.  I already established its equivalency in the past.
15:40:31 <chandler> again? I've never said anything about unit testing here before
15:40:36 <kc5tja> I've yet to see one "proof" that isn't directly representable as a unit test.
15:40:52 <kc5tja> Yes, several months ago.  There was a big huff about it, and I'm not about to repeat the incident.
15:41:09 <chandler> er, I personally don't think I /ever/ brought it up
15:41:14 <chandler> it must be with someone else
15:41:33 <kc5tja> Even so, it doesn't change my standpoint.
15:41:43 <chandler> how do you check a loop invariant with a unit test?
15:41:48 <kc5tja> A unit test is as much a proof as any lemma or mathematical proof can be.
15:41:51 <thin> boy aren't you being INTP today? ;)
15:42:20 <chandler> it's a proof of correctness of those inputs... but then you've got to show that those inputs cover all possible edge cases, no?
15:42:25 <kc5tja> chandler: By verifying it's the proper state every loop iteration, or if required, several times per loop iteration.
15:42:39 <chandler> but that's only for one input, no?
15:42:43 <chandler> not over all inputs
15:42:50 <Herkamire> qFox: : swap over >r >r drop r> r> ;    or if you don't mind killing the value in the a register:   : swap >a >r a> r> ;
15:42:52 <kc5tja> Using hierarchial tests, you can compose them into larger, more elaborate tests.
15:43:03 <kc5tja> No.  It's for whatever inputs you *want*.
15:43:09 <kc5tja> It's how you code the unit tests.
15:43:11 <chandler> ok, for some subset of equivalents...
15:43:16 <chandler> er, some subset of tests
15:43:23 <chandler> which as I said, needs to be shown covers the entire space then
15:43:35 <kc5tja> Then no mathematical proof is 100% complete either.
15:43:42 <chandler> eh?
15:43:56 <kc5tja> Nobody has ever "proven" that + adds two integers for all possible sets of inputs, as no *exhaustive* test of + has been performed.
15:44:01 --- join: rO| (bjazz@pD9E595A9.dip.t-dialin.net) joined #forth
15:44:04 <chandler> what's +?
15:44:10 <kc5tja> ADDITION!
15:44:10 * rO| greets
15:44:20 <chandler> um, in a particular language you mean?
15:44:22 <kc5tja> rO|: re
15:44:27 <kc5tja> chandler: Math.
15:44:32 <chandler> eh. it's true by definition.
15:44:39 <kc5tja> Irrelavent.
15:44:40 <rO|> kc5tja: :-)
15:44:43 <chandler> No, it's not.
15:44:56 <chandler> Proof wouldn't exist unless some statements were vacuously true
15:45:04 <kc5tja> Yet, you're unwilling to let certain basic givens exist for digital systems.
15:45:12 <chandler> Eh?
15:45:29 <kc5tja> A unit test tests those things which *can* break.
15:45:40 <kc5tja> Everything else is taken to be true, "by definition."
15:45:47 <chandler> how do you know ahead of time which things can break though?
15:46:44 <kc5tja> There are patterns you look for that are tell-tale signs of things to unit test.  Are things dependent on *when* they arrive at a gate?  Are things dependent on certain bit values?  etc.
15:46:57 <kc5tja> The results of an AND gate is as true for all inputs as + is for all natural numbers.
15:47:01 <kc5tja> No need to test an AND gate.
15:47:31 <kc5tja> But when an AND gate feeds back into another AND gate that feeds into the original (so as to form a latch for example), then you can unit-test that, because proper operation depends on propegation delays, setup times, and hold times.
15:47:47 <kc5tja> ONCE THAT IS TESTED, you *KNOW* that it is good, and hence, there is *zero* need to test all other instances of such a gate.
15:47:47 <chandler> sure, but I'm talking about the algorithm itself
15:48:24 <chandler> a unit test is great for verifying that the logic implements the algorithm you've described, but I don't see how it can prove the correctness of your algorithm
15:48:35 * kc5tja cries!!!!
15:49:13 <chandler> ?
15:49:17 <kc5tja> I give up.
15:49:24 <chandler> nono, I'm legitimately confused here
15:49:29 <chandler> I'm not arguing for one thing or another
15:49:35 <kc5tja> What algorithm?
15:49:37 <qFox> goddamnit there are some fucking retarts on this planet
15:49:41 <qFox> argh
15:49:49 <chandler> qFox: are you talking about me?
15:50:00 <qFox> ehm, who are you? :)
15:50:08 <kc5tja> Clearly, if you send data to the chip, and in one clock cycle, you get correctly formed Huffman-encoded data out, then it must work.
15:50:10 <qFox> no not related to this discussion
15:50:16 <chandler> kc5tja: well, in this case it was the huffman decoder, but it might also be a floating-point division algorithm
15:50:33 <kc5tja> Algorithms are built on smaller sub-algorithms.
15:50:40 <chandler> so you just test it for all possible inputs?
15:50:42 <kc5tja> Prove those sub-algorithms, and you prove, by induction, the algorithm.
15:50:45 <kc5tja> Repeat to the smallest level.
15:51:01 <kc5tja> No.  You test it for all critical paths.
15:51:10 <kc5tja> Again, test only what can break, not everything everytime.
15:51:28 <kc5tja> Consider the case of binary addition.
15:51:44 <kc5tja> There are only two paths that can break; each is a border case for a single bit in the operation.
15:51:45 <chandler> ok... so you have to prove that your unit tests cover all possible breakages, right?
15:51:55 <kc5tja> Adding a '1' and '1' to yield '0', but with a carry.
15:52:13 <kc5tja> So there is no point in adding "100" and "010" because you know it'll work -- no carry.
15:52:23 <qFox> i reported a bug on mirc, where the parser takes the arguments of a function, and uses it as arguments for the while (if you use it in a while). one fucktart tells me that the parameter belongs to the function (i thought i was reporting a bug where it wasnt the case?), and some other retards just had to comment on my example where one statement trumps the other, and how its useless and all... ITS A GODDAMN EXAMPLE!
15:52:24 <qFox> http://trout.snt.utwente.nl/ubbthreads/showflat.php?Cat=&Board=bugreports&Number=81858&page=0&view=collapsed&sb=5&o=31&fpart=1&vc=1&PHPSESSID=
15:52:24 <kc5tja> Likewise, there is equally no point in adding "010" and "001".
15:52:37 <chandler> right right, I certainly understand that
15:52:43 <kc5tja> But when adding "001" and "001", to get "010", that's one border case.
15:52:55 <kc5tja> But so is "011"+"001".
15:52:58 <thin> qfox: welcome to the world
15:53:18 <rO|> howdy thin
15:53:21 <kc5tja> Having proved that "011"+"001" works, AND that "010"+"010" works, then there is no further need to test "110"+"010".
15:53:24 <thin> some ppl never READ no matter how carefully you write :(
15:53:32 <rO|> seldom guest
15:53:47 <qFox> i hate the world.
15:54:24 <kc5tja> (obviously, this is assuming ripple carry; if you're using look-ahead carry generators, then you would need to test it out to the full byte, but ONLY to the full byte; for a 32-bit implementation, or a 64-bit implementation, this can save years to decades of test time.)
15:55:08 <chandler> I'm having trouble making the leap to finding the possible edge cases in a large algorithm
15:55:27 <kc5tja> That's the point; large algorithms are built out of smaller algorithms.
15:55:30 <kc5tja> That's the *whole* *key*.
15:55:42 <chandler> but does that prove that you've put the large algorithm together properly though?
15:55:51 <kc5tja> If you can't grok that, then of course you won't understand how partial tests can prove, undeniably, the proper operation of a complex algorithm.
15:56:04 <thin> qFox: try loving the world instead :P
15:56:12 <chandler> even if my ripple adder works properly, does this mean that I've assembled them correctly?
15:56:16 <kc5tja> The connection of subalgorithms is itself a subalgorithm (just as it is in real-world math).
15:56:22 <kc5tja> Yes, it does.
15:56:26 <kc5tja> It absolutely does.
15:56:29 <chandler> Why?
15:56:41 <kc5tja> Because there can be no other possibility.
15:57:00 <chandler> er. I can understand that this proves that the logic implements the algorithm correctly, but I don't see how it proves that the algorithm itself does what I think it does
15:57:11 <kc5tja> If there were any error, any error at all, in your ripple-carry adder, it'd show up *right* away as you tested individual bits in isolation.
15:57:29 <kc5tja> That's a mutually self-recursive definition.  No proof can prove itself.
15:58:26 <chandler> Hm?
15:58:48 <kc5tja> How does one know ANY algorithm "works?"
15:59:00 <chandler> by mathematical proof...
15:59:08 <kc5tja> How do you know the proof works?
15:59:17 <chandler> Hand verification :-)
15:59:28 <kc5tja> Thank you.  'Nuff said.
15:59:48 <chandler> but another way to help show that a really complicated system is correct is to use machine proof
16:00:02 <chandler> it's not a guarantee (the machine prover still needs to be hand-checked) but it's a benefit
16:00:05 <kc5tja> How do I know the machine proof is correct?
16:00:26 <chandler> argh. you don't. but it's nice to do just in case it finds an error
16:00:31 <kc5tja> And are you willing to hand-prove an algorithm for a, say, speech synthesizer by hand?
16:00:38 <chandler> which is why AMD used ACL2 to prove most of the floating-point on their processors
16:00:46 <kc5tja> See that "Argh." in your above line?  now you know how I feel.
16:00:54 <chandler> no, but I might be willing to prove a proof-checker by hand
16:01:18 <kc5tja> chandler: So proofs are checked by verifying underlying proofs.
16:01:23 <kc5tja> Well, why can unit tests do the same?
16:01:30 <chandler> hey, I didn't say that this was the end-all-and-be-all of everything
16:01:38 <kc5tja> Like I said, I have yet to see *one* proof that cannot be verifying automatically and recurringly via a unit test.
16:01:45 <chandler> just that it might be worth some extra value aka cash to some buyers
16:02:09 <kc5tja> chandler: As I recall, the original query was whether or not that $10,000 bought a proof along with the chip.
16:02:20 <chandler> kc5tja: If you're willing to accept a few definitions (namely that + means "addition"), I can prove to you that the euclidian algorithm calculates the GCD of any two numbers
16:02:26 <chandler> right
16:02:59 <chandler> the reason I ask is that people /do/ run their algorithms through proof-checkers, and that it might be worth a bit more. that's all.
16:03:14 <kc5tja> chandler: I'd like to see such a proof.  Not that I don't believe you, but I'd like to see how such a proof would differ from a set of unit tests that verifies the same thing.
16:05:18 <qFox> what three words does EVAL call? ' NUMBER? and ERROR right?
16:05:38 <kc5tja> qFox: EVAL, I'm assuming, is like ANSI's EVALUATE?
16:05:42 <kc5tja> I don't know what EVAL is otherwise.
16:06:27 <kc5tja> chandler: Having something concrete in front of us would help us refine the distinctions between a formal proof and a unit test, and what proofs can and cannot be acquired from a unit test suite.
16:06:39 <qFox> uhm, well just the EVAL in this example,   : QUIT QUERY EVAL ; 
16:06:43 <chandler> rather than trying to type out a proof in IRC, I've hand-verified the one at http://www.lapcs.univ-lyon1.fr/~nthiery/macs358/Notes/2_Proofs/ProofOfCorrectness.html :-)
16:06:50 <qFox> where quit is the main loop of all of forth... 
16:07:07 <qFox> query checks the input buffer for input, eval reads it
16:07:15 <qFox> and processes per word
16:07:25 <qFox> (thats my understanding of how it works...)
16:07:49 <chandler> kc5tja: the logic in a proof of correctness works compositionally just like you were describing, being built up from the bottom
16:08:00 <chandler> but it's focused on showing correctness, not finding potential incorrectness
16:08:29 <qFox> then once eval has a delimited word (usually by space), look the word up in the dictionary, if not found try to convert ot a number and push it on the stack, and if thats not possible return an error. then continue back to scanning the next word...
16:08:34 <chandler> so the statements made will be "always" statements - gcd(i_k, j_k) = gcd(a, b) for all iterations of the loop, for instance
16:09:18 <chandler> this is why a proof seems to be a bit different than a unit test to me, unless you can show that your unit test covers the entire test spce
16:09:21 <chandler> er, test space
16:09:25 <kc5tja> qFox: That is a rather system-dependent word.  At least FIND is called, but that's all I can say about it.
16:10:29 <kc5tja> chandler: I'll take it section by section.
16:11:08 <kc5tja> chandler: Section 1.2.2: Specification of a function.  The unit test can attempt to invoke the function with known-illegal values (e.g., calling sqrt() with n < 0) and verifies the correct behavior (e.g., does it throw the proper exception?).
16:11:18 <qFox> ok, i'll take my own interpretation of it and code it, when i'm done i'll show it for evaluation (to see if it behaves as it should, as i'm not using any guide or example, and this is my first time at such at this lowlevel :)
16:12:03 <chandler> kc5tja: right, but does that show that it is correct for ALL input, or merely that invalid input is rejected?
16:12:57 <kc5tja> chandler: I'm still reading!!  Give me a chance here, I'm reading it section by section.  Section 1.2.2 deals exclusively with invalid input, so that's what I concentrated on.
16:13:19 <chandler> yeah, 1.3 and on deal with program correctness
16:15:09 --- join: slava (~slava@69.196.155.184) joined #forth
16:15:10 <slava> hey
16:15:12 <kc5tja> Besides the obnoxiously irritating and rediculous symbology used for proofs, the unit test can also assert that for a sufficiently large representative sample of values of valid inputs x, that x = y*y, where y = sqrt(x).
16:15:15 * slava just installed archlinux
16:15:35 <chandler> hm, irritating? which symbology?
16:15:45 <chandler> the {P} s {Q} notation is pretty standard
16:15:52 <kc5tja> * P: y:=sqrt(x); 
16:15:52 <kc5tja> * X: x 
16:15:52 <kc5tja> * P(x): y 
16:15:52 <kc5tja> * Q(x): x>=0 
16:15:52 <kc5tja> * R(x,y): y2=x 
16:16:14 <chandler> oh oh, read past that
16:16:16 <chandler> start at 1.3
16:16:56 <chandler> normally program proofs are sequences of {precondition} statement {precondition} statement ... {precondition} statement {postcondition}
16:17:27 <kc5tja> 1.3.1 is supported by using white-box testing in the unit tests (which I do *very* often in my software tests; so far haven't had a need for them in my hardware designs)
16:18:09 <chandler> what's white-box testing?
16:18:56 <chandler> oh. well if it does what this does, then it's just a (possibly partial) proof of correctness :-)
16:19:36 <kc5tja> 1.3.1 and 1.3.2 are both handled via proper factoring.
16:19:40 <kc5tja> Poorly factored code is untestable.
16:19:52 <chandler> eh? proper factoring?
16:20:01 <chandler> I don't see what this has to do with it
16:20:33 <kc5tja> The more factored a program, the finer the granularity of interfaces.
16:21:03 <kc5tja> You can't single-step through a big, monolithic function to verify correctness after each program line.
16:21:17 <chandler> GAH. this isn't about a "big" function
16:21:20 <chandler> this is about the compositional rule
16:21:30 <chandler> you said earlier that algorithms are composed of subalgorithms
16:21:35 <chandler> that's exactly what this is describing
16:21:45 <kc5tja> But if the program-under-test invokes lots of smaller functions, and each of those functions are independently verified to be working (ignore how for the time being), then the need for the type of proof of 1.3.1 is no longer necessary.
16:21:51 <chandler> it's not about "handling" things either... this is just a description of the rules you use to prove correctness
16:22:15 <kc5tja> Right, and I'm providing a 1:1 correlation between the mathematical theory and the real-world practice of unit testing.
16:22:25 <chandler> I don't see that at ALL. how do you prove that the sequence of calling those functions composes into a correct algorithm?
16:22:33 <chandler> the only way to do that is to insert logical statements in the sequence
16:22:40 <chandler> it doesn't matter how big that sequence is
16:22:42 <chandler> or what's in the middle
16:22:52 <kc5tja> OK, then I consider this discussion over.
16:23:03 <chandler> you've got to get from point A to point C, and the only way to get there is by point B
16:23:07 <chandler> eh?
16:23:16 <kc5tja> Forget it.
16:23:21 --- quit: slava ("Leaving")
16:23:22 <chandler> ooohkay....
16:23:24 <kc5tja> It's clear that I can't explain my logic.
16:23:32 <kc5tja> It's clear that nobody is willing to listen, or to even consider it.
16:23:33 <thin> i get kc5tja's logic
16:23:34 <kc5tja> So what's the point?
16:23:55 <kc5tja> You're so wrapped up with mathematical theory that you fail to see pragmatic reality, and how there IS a correlation between the two.
16:23:58 <kc5tja> Pity.
16:24:07 <thin> it goes beyond that too
16:24:10 <thin> to a philosophical level
16:24:24 <chandler> Look. I'm just trying to understand how unit testing shows a program correct over all possible inputs
16:24:27 --- nick: rO| -> rO|afk
16:24:34 <chandler> I'm not "failing to see pragmatic reality"
16:24:38 <chandler> if that were the case I wouldn't use unit tests myself
16:24:40 <chandler> but I do
16:24:50 <thin> lots of ppl don't realize that philosophy is the ultimate pragmatic science
16:25:32 <chandler> I'm trying to listen to you, but telling me that the definitions of the rules you use in unit testing can be "handled" sounds silly. These aren't cases, they're rules for doing proofs.
16:25:39 <kc5tja> Like I said, this erupted into an all-out flame war and huge battle, terminating in me leaving this channel for at least two days.
16:25:40 <rO|afk> thin: please explain that
16:25:44 <kc5tja> I am not about to repeat that spat.
16:25:56 <chandler> I'm not trying to do a flame war, for my part.
16:26:14 <chandler> I'm sorry if this has broken into one in the past
16:26:30 <chandler> but I'm really just trying to understand what you're saying
16:26:43 <rO|afk> thin: please explain that. about phil as pragmatic sience
16:26:46 <kc5tja> You take the term "handled" entirely out of context.
16:26:57 <chandler> you said that 1.3.1 can be handled by proper program factoring
16:27:03 <kc5tja> Yes.
16:27:04 <chandler> but 1.3.1 isn't a case, it's a basic rule
16:27:18 <chandler> it's the basic compositional rule
16:27:29 <kc5tja> Handled, as in, "Dealt with.  Automated.  So I don't have to explicitly think about it.  And in a way that is proven (via the proof methodology of your choice) to work."
16:27:43 <thin> rO|afk: philosophy is a science that defines the proper relationship between volitional consciousness and reality
16:28:35 <kc5tja> thin: Philosophy is not a science; it fails to perform empirical tests, to collect data, or to generalize about the results.  It is only half-scientific, because it does share the first steps of the scientific method: ask questions, hypothesize, possibly even think up HOW to test it.  But they never actually test it.
16:29:00 <chandler> I don't see how the compositional nature of proof can be "dealt with"! If you've got a sequence of words, and you want to assert that at the end of this sequence there will be 5 values on the data stack, I don't see how else to do it except by showing what the number of values on the stack will be between each word, and thus that the last word will take the shown number of values and leave 5*n
16:29:07 <chandler> er, that first 5 should be "5*n"
16:29:29 <rO|afk> thin: philo=love sophy=wisdom. nothing about definition actually, or?
16:29:38 <kc5tja> It can be done by proving the correctness of each individual word in that list.
16:29:51 <kc5tja> Then, the end result *MUST* (not possibly may, not could be, MUST) be 5*n.
16:29:54 <chandler> right, but how do you combine that into a proof that there will be 5*n at the end?
16:30:01 <chandler> except by showing things in the middle?
16:30:03 <thin> well in this case the "science" is refering more to induction, i.e. the primary process of reaching knowledge that goes beyond perception.
16:30:16 <chandler> eg, that the first word will leave 2*n, the second 3*n, the third 4*n, and the fourth and final 5*n?
16:30:25 <chandler> that's all rule 1.3.1 says
16:30:42 <kc5tja> I'm not saying the rule disappears.
16:30:44 <chandler> that you insert statements in the middle of the program which combine the proofs of the small parts into a large part
16:30:52 <kc5tja> I'm saying the rule is handled automatically -- that *I* don't ahve to think about it.
16:30:58 <rO|afk> thin: oh, you meant that academic thing ;-)
16:31:02 <kc5tja> E.g., I don't have to *worry* about it when proving the correctness of a function.
16:31:06 <kc5tja> Why must I repeat this so many times?
16:31:25 <chandler> because I don't understand what's "handling" it
16:31:36 <kc5tja> Never mind.
16:31:39 <kc5tja> Forget it.
16:31:45 <chandler> nono, seriously, I just don't grok what you're saying
16:31:52 <thin> chandler: nothing is "handling" it cuz it's already been handled :P
16:32:09 <thin> its treated as an axiom
16:32:23 <chandler> by what? in this case I was talking about proof by hand
16:32:27 * thin could be wrong cuz he hasn't really been following the convo
16:32:39 <kc5tja> chandler: And I'm talking about unit tests!!!
16:32:39 <thin> by the unit testing
16:32:44 <chandler> thin: I was trying to show how to prove the correctness of the euclidian algorithm by hand
16:32:56 <chandler> and kc5tja said that he could prove it by unit tests
16:33:06 <thin> chandler: he already knows that it can be proven by hand
16:33:13 <thin> we're not talking about proving things by hand
16:33:20 <thin> it can also be proven by unit tests
16:33:24 <kc5tja> If I have a word: : 5n +n +n +n +n ;
16:33:33 <chandler> 18:03 <@kc5tja> chandler: I'd like to see such a proof.  Not that I don't believe you, but I'd like to see how such a proof would differ from a set of unit tests that verifies the same thing.
16:33:44 --- quit: rO|afk ("back to work")
16:33:51 <thin> chandler: did you show him that proof? an url?
16:33:57 <chandler> thin: yes
16:33:58 <kc5tja> thin: yes, he sent me the URL.
16:34:00 <chandler> http://www.lapcs.univ-lyon1.fr/~nthiery/macs358/Notes/2_Proofs/ProofOfCorrectness.html
16:34:01 <kc5tja> Forget it.
16:34:02 <kc5tja> I'm done.
16:34:07 <kc5tja> I give up.
16:34:08 <kc5tja> You win.
16:34:09 <kc5tja> I lose.
16:34:10 <chandler> look, you said that it could be shown by unit tests
16:34:16 <chandler> I am really seriously trying to understand here
16:34:21 <chandler> but it just doesn't make sense to me
16:34:34 <kc5tja> chandler: Write *executeable* *proofs.*
16:34:42 <kc5tja> That's a unit test.
16:34:52 <kc5tja> In one sentence, that's a unit test.
16:35:26 <chandler> I don't know what an executable proof looks like, except other than feeding the proof of gcd into ACL2
16:35:49 <kc5tja> Does ACL2 actually execute and benchmark the code being tested?
16:35:56 <chandler> no, it verifies the given proof :-)
16:36:12 <kc5tja> Then to me, it's no proof.
16:36:16 <kc5tja> I want to see real-world output.
16:36:21 <chandler> but wouldn't it take an infinite number of executions of gcd to show that gcd returns properly for all inputs?
16:36:28 <kc5tja> I want to see the physical product, that will end up in the customer's hands, being exercised.
16:36:54 <chandler> I don't disagree with that
16:36:59 <kc5tja> It would with a formal proof too!
16:37:06 <chandler> whuh?
16:38:03 <thin> chandler: a real working product qualifies as a proof.. don't be too literal
16:38:27 <kc5tja> Look at the example in 1.3.5, for multiplication.
16:38:35 <kc5tja> "Induction step: ASSUME that..."
16:38:48 <kc5tja> Induction is required for formal verification with unit tests.
16:38:59 <kc5tja> It's also, apparently, required for use with hand-proving code too.
16:39:20 <chandler> I never said it wasn't
16:39:41 <chandler> are you saying that you can use induction to show that the unit tests cover the entire testing space?
16:40:25 <kc5tja> Yes.
16:40:49 <chandler> Oh. Well that sounds like a proof to me. How would you do that for the gcd algorithm, just as an example?
16:41:08 <chandler> (I think many lines above I mentioned that showing that the unit tests cover the entire input space would be sufficient)
16:42:46 <chandler> aw crap, gotta run
16:53:51 <kc5tja> chandler: I just finished my unit test example!
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16:55:02 <kc5tja> Of course, no sooner than I finish something....he has to up and leave.  :/
17:00:14 <thin> do you know the difference between kinky and perverted?
17:00:14 <thin> kinky is where you use a feather
17:00:16 <thin> perverted is where you use the whole chicken
17:01:07 <kc5tja> Brilliant elucidation of your vocabulary knowledge.  :D
17:02:08 <thin> heh :P
17:03:17 <tathi> kc5tja: can we see your unit test example?
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17:03:22 <qFox> man i will be so happy when i'm finally done with this basic interpreter 
17:04:47 <kc5tja> tathi: Yeah, hold on.
17:05:52 <tathi> no rush, I'm just curious
17:06:57 <kc5tja> http://www.falvotech.com/cgi/fsforth/PikiSandBox
17:12:39 <qFox> shouldnt it, for completeness, have a double negative test? :)
17:12:56 <kc5tja> Describe a double-negative test.
17:13:03 <qFox> you have neg,pos pos,neg and pos,pos
17:13:05 <kc5tja> I already prove parameter invariants in both functions.
17:13:08 <qFox> the try's
17:13:22 <qFox> then the pos,pos is just as redundant.
17:13:40 <kc5tja> No, because the pos,pos case verifies the arithmetic of the result.
17:13:55 <kc5tja> There is no need for double-negative, because it's guaranteed to error out if any *one* parameter is negative.
17:14:18 <qFox> oh it only takes postive's? i thought it was the greatest common devisor?
17:14:28 <kc5tja> It is.
17:14:36 <kc5tja> But it's Euclid's algorithm.
17:14:40 <qFox> imo you can devide a neg num by a neg num
17:14:49 <qFox> oh, and that doesnt include neg\neg ?
17:14:51 <kc5tja> No.
17:14:57 <qFox> oki nothing said.
17:14:58 <qFox> :)
17:15:02 <kc5tja> Euclid's algorithm works only for positive integers.  :)
17:15:11 <qFox> evilish
17:15:22 <kc5tja> If you want, you could make a wrapper function to handle the double-negative case, but...
17:16:13 <qFox> yeye just noticed that one missing
17:16:32 <qFox> thought it checked for correctness of taking negative/positive numbers, not either it errors out correctly
17:29:07 <qFox> alrighty
17:29:17 <qFox> lets try my eval thingie :)
17:29:39 <qFox> failure.
17:30:56 <kc5tja> OK, I'm off to work on the UART receiver module.
17:35:32 <madgarden> kc5tja, what is that code on your sandbox page... looks like Pascal or something?
17:36:10 <qFox> kc5tja> if the stack is 0 deep, and you do dup, what should be the result?
17:36:24 <qFox> (in a cpu register, on cpu level i mean)
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17:39:15 <TheBlueWizard> hiya all
17:39:49 <madgarden> Greetings, program.
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17:49:34 <tathi> qFox: probably undefined.
17:49:45 <tathi> though I think Chuck's chips all have a circular stack
17:49:56 <qFox> meaning?
17:50:00 <madgarden> Depends on the Forth? Some do "underflow".
17:50:27 <qFox> well thing is, dup xor xor is a quicker way to get 0 to the TOS, then ldi 0 
17:50:42 <tathi> meaning that there is no "depth" exactly
17:50:47 <qFox> the first takes 3 instructions, the second takes 5
17:51:04 <tathi> if you put more than 16 (or whatever) things on the stack, it wraps around and starts overwriting itself
17:51:19 <tathi> similarly if you drop more items than you put on.
17:51:20 <qFox> but in order to be sure this works as it should, i need to be sure that dup on a empty stack returns a number... any number will do
17:51:27 <qFox> oh right
17:51:31 <tathi> yeah, that should be fine.
17:51:35 <TheBlueWizard> um...dup xor would generate a 0, assuming there is something on stack
17:51:36 <qFox> but it will return a number on a empty stack right?
17:51:47 <qFox> right
17:51:49 <qFox> thats what i mean
17:51:50 <qFox> :)
17:52:28 <tathi> qFox: yes, it should return a number on an "empty" stack.
17:52:31 <qFox> oki
17:53:37 <qFox> i meant dup dup zero :)
17:53:40 <qFox> dup dup x0r
17:58:03 <kc5tja> madgarden: Some hypothetical pseudocode.
17:58:24 <kc5tja> madgarden: It's to prove a point that unit tests *can*, if engineered correctly, serve as proofs.
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17:59:50 <TheBlueWizard> kc5tja: are you talking about this dup xor thing?
18:00:12 <kc5tja> TheBlueWizard: No.  
18:01:07 <TheBlueWizard> ok
18:04:03 * kc5tja is currently working on the UART's receiver right now.
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18:40:58 <qFox> oh btw, Herkamire> my swap: sta push lda pop
18:41:07 <qFox> destroys A register though
18:41:59 <qFox> sta = T to A, lda = A to T
18:42:29 <qFox> actually, sta = pop T to A, lda = push A to T
18:43:24 <qFox> and this fits in one execution word ;) push push drop pop pop is 1.25 at least :)
18:47:17 <qFox> or to copy R to T: pop dup push
18:55:23 <kc5tja> OK, having some rather nasty problems modeling tri-state behavior with Icarus.  :/
19:00:30 <TheBlueWizard> gotta go...bye all
19:00:39 --- part: TheBlueWizard left #forth
19:04:52 <qFox> say, if you have 2 numbers, then they are the same if the result of the XOR is 0, right?
19:06:46 <kc5tja> Yes.
19:14:31 <qFox> sleep time
19:14:32 <qFox> nite
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19:57:23 <I440r> boo
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20:10:29 <kc5tja> Boo.
20:10:36 * kc5tja is working on the UART receiver core.
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20:28:20 <Klaw> sneak preview didn't make it into the url
20:28:57 <Klaw> into the title i meant
20:29:00 <Klaw> of the channle
20:30:18 <kc5tja> It did.
20:30:24 <kc5tja> Your IRC client is truncating the topic message.
20:30:30 <kc5tja> It's not important anyway.
20:30:43 <kc5tja> The sneak preview is just a bogus picture of someone's shack, with wires and whatnot strewn about.
20:30:49 <Klaw> oh you blame it on the client
20:31:05 <kc5tja> Use irssi, and type /topic, and note that it returns the full topic.  :)
20:31:20 <kc5tja> 20:28 -!- Topic for #forth: A channel dedicated to the Forth programming language, its implementation, its application, and its philosophy.  ::  UPDATE: Those 
20:31:24 <kc5tja>           interested in the up-coming ForthBox Kestrel home computer kit are invited to review the Kestrel's very own Wiki at http://www.falvotech.com/cgi/kestrel || 
20:31:26 <Klaw> :P
20:31:27 <kc5tja>           kuvos, a words database bot: !fhelp !fsee !fdef || SNEAK PREVIEW IMAGES OF THE FORTHBOX KESTREL!!! http://www.wsu.edu/~jackdoll/jak/comp/images/comp4.jpg
20:31:30 <kc5tja> 20:28 -!- Topic set by arke [] [Sat Mar 27 18:50:32 2004]
20:48:26 <Herkamire> Klaw: I seccond the irssi reccomendation
21:05:22 <kc5tja> OK, this UART receiver implementation is really giving me major headaches.
21:06:05 <kc5tja> A lot of the issues around it stems from the fact that it's apparently not possible to reliably model tri-state buses with Icarus Verilog.
21:06:41 <kc5tja> The transmitter is working fine.
21:06:50 <kc5tja> The receiver even *sees* the serial bit-stream coming in.
21:07:09 <kc5tja> But it still receives garbage in the shift register, and for reasons I'm unaware of.
21:08:43 <Herkamire> what does this do?   lea EDX, [5+EAX*4+EDX]
21:09:08 <kc5tja> EDX := 5 + (EDX + (4*EAX))
21:09:45 <kc5tja> LEA is the Load Effective Address instruction; in this case, it's being used as a 3-operand load and multiply instruction.
21:09:47 <Herkamire> thanks
21:09:59 <kc5tja> err, add and multiply, I should say.
21:10:48 <Herkamire> and one more: add EDX, [4-EDX]
21:11:42 <Herkamire> wait, LEA loads memory from an address? or it just calculates an address and leaves it in EDX?
21:12:17 <Herkamire> oh, you answered already. it just makes an address
21:14:09 <kc5tja> Load 
21:14:17 <kc5tja> Load Effective Address
21:14:22 <kc5tja> Not Load from memory.
21:14:29 <kc5tja> It loads the effective address into a CPU register.
21:14:30 <Herkamire> ???
21:14:38 <Herkamire> ahh
21:15:14 <Herkamire> this looks simple, but I don't understand:  add EDX, [4-EDX]
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21:22:19 <Herkamire> doesn't this add EDX, [4-EDX] translate to:   EDX := 4
21:22:25 <I440r> herk it adds to edx the contents of the memory address 4 pytes prior to whhere edx points to
21:23:05 <I440r> i.e. if edx points to address 1234 and address 1230 contains 00000002 then edx will have 2 added to it
21:23:30 <I440r> always read [xxxx] as "contents of the memory address"
21:24:13 <Herkamire> oh
21:25:34 <madgarden> So what's an "effective address" then?
21:25:57 <Herkamire> oh wow. I think I understand the code now
21:26:06 <I440r> lea is different
21:26:14 <I440r> you can do lea eax, [eax+4]
21:26:19 <I440r> and its adding 4 to eax
21:26:37 <I440r> the example is silly however because add eax, byte 4 is just as fast but smaller
21:26:38 <I440r> however
21:27:08 <I440r> lea eax,[eax+4*ebx]  <-- you can compute the "Effective" address of eax plus (4 * ebx)
21:27:11 <Herkamire> let me guess... a call instruction is one byte, followed by 4 bytes for the address?
21:27:21 <I440r> yes
21:27:27 <Herkamire> kc5tja, I440r: thank you for your asm help
21:27:50 <I440r> there can be up to 10 bytes in the opcodes for some instructions :)
21:28:15 <I440r> tho that is rare
21:28:41 <I440r> oh yea another good use for lea
21:28:53 <I440r> lea eax, [eax+2*eax] ; multiply eax by 3
21:29:27 <I440r> lea eax, eax+4*eaX] ; BY 5
21:29:44 <I440r> you can scale by 2* 4* 8* and errr.. maybe 16* i ferget
21:29:54 <Herkamire> is there no multiply instruction?
21:30:06 <I440r> yes
21:30:13 <I440r> mul and imul
21:30:31 <I440r> but for 3* 5* etc the lea is WAY faster
21:30:32 <Herkamire> why are there square brackets around the math?
21:30:36 --- join: Frek (~anvil@h33n2fls31o815.telia.com) joined #forth
21:30:51 <I440r> hi frek
21:30:57 <I440r> you a forth coder ?
21:30:58 <Frek> hello I440r 
21:31:12 <Frek> not directly 
21:31:14 <Herkamire> I see. My original question was about doing 5* that way
21:31:27 <Frek> I know some, but my knowledge is very limited.
21:31:49 <I440r> the lea is faster and smaller i believe
21:32:05 <I440r> frek what forths do you have now ?
21:32:32 <Frek> I440r: mainly using OF forth (dialect of ANS Forth I believe)
21:32:39 <I440r> aha
21:32:44 <Frek> either way; I'm in a hurry. ttyl 
21:32:50 <I440r> <-- anti ans (not)forth :)
21:33:08 <I440r> isforth.clss.net :)
21:38:49 <kc5tja> Herkamire: The square brackets are there because that is how indirect effective addresses are written.
21:39:15 <kc5tja> Herkamire: [EDX] refers to the byte/word/dword/qword/whatever *at* the address contained in EDX.
21:39:35 <kc5tja> Herkamire: EDX merely refers to what's currently *in* EDX.
21:39:46 <Herkamire> kc5tja: oh, so because it's a lea instruction, you know that it's putting the address in the register, rather than fetching from it.
21:40:29 <kc5tja> Herkamire: Well, let's put it this way: MOV EAX,[4*EDX] is the same as executing the two following instructions: LEA EAX,[4*EDX] : MOV EAX,[EAX]
21:40:30 <I440r> yes
21:40:39 <kc5tja> LEA computes an address.
21:40:42 <kc5tja> MOV actually does the grunt-work.
21:40:57 <kc5tja> Hence the name, "MOVe."  :)
21:41:29 <I440r> :)
21:41:48 <Herkamire> I still can't get over how one mnemonic can compile to many different machine instructions
21:41:56 * kc5tja got desparate; I joined the geda-user mailing list, and have posted my question pertaining to tri-state buses on the mailing list.
21:42:04 <kc5tja> I can't, for the life of me, figure out how to get tri-state buses working in Icarus.
21:42:06 <Herkamire> or at least do wildly different things, depending on your arguments
21:42:28 <I440r> herk welcome to x86 hehe
21:42:35 <kc5tja> Herkamire: It's the same with C; consider how varied = is.
21:42:57 <kc5tja> MOV ultimately just moves data from A to B.
21:42:59 <Herkamire> kc5tja: yes, I'm sure it's fine. I'm just used to asm being low level
21:43:02 <kc5tja> Whereever A and B happen to be.
21:43:24 <Herkamire> on ppc if you want to fetch memory, you use a load instruction
21:43:38 <kc5tja> The CPU interprets where data is by computing the effective address, and if in memory, fetching it first.
21:43:59 <kc5tja> I can make a PowerPC assembler that behaves much like Intel's assembler, believe me.
21:44:10 <kc5tja> Intel *does* have separate opcode values for different kinds of moves.
21:44:23 <kc5tja> It's just that the assembler gives them all one name.  Which byte to emit depends on the arguments.
21:44:32 <thin> kc5tja: is icarus a verilog implementation or something?
21:44:32 <Herkamire> oh
21:44:42 <kc5tja> e.g., moves to segment registers are wholesale different from moves to general purpose registers.
21:44:44 <Herkamire> is there asm syntax for x86 that is more explicit?
21:44:44 <I440r> actually mov is MANY opcodes... loads and stores
21:44:46 <kc5tja> thin: Yes.
21:44:46 <thin> google "verilog tri-state" brings up lots of pages..
21:45:00 <I440r> it was a bad idea to call them ALL "mov"
21:45:07 <I440r> but thats intel for ya
21:45:19 <kc5tja> thin: I've already tried a number of approaches to it, at least two of which is documented in my Verilog HDL book.  Nothing works with Icarus.
21:45:38 <thin> werid..  how about trying it in a different implementation?
21:46:03 <kc5tja> thin: If you can find another Verilog implementation that is free for download, free to use, and runs for Linux, I'll be sure to give it a try.
21:46:35 <kc5tja> thin: Otherwise, I'm restricted to the free versions of Verilog for Windows, which DO NOT SIMULATE, but they DO synthesize.
21:46:49 <kc5tja> The distinction is important to me, because none of my designs are currently synthesizable.
21:47:22 <kc5tja> Herkamire: None that is supported in any significant numbers.
21:47:34 <thin> how do you convert your designs to dsynthesizable?
21:47:37 <kc5tja> All who have tried to rationalize the Intel syntax have failed to catch on in the market.
21:47:58 <Herkamire> interesting
21:48:08 <Herkamire> it's just another programming language I suppose
21:48:12 <kc5tja> thin: I use a register-transfer structure, or I re-write the module to use gate-level representation instead of behavioral.
21:48:48 <thin> is there nothing as good as icarus available for windows?
21:48:59 <kc5tja> thin: I'm not on Windows.
21:49:08 <I440r> u mean there is NO rational explanati9on for x86 :P
21:49:10 <kc5tja> thin: And to get simulation, even FOR Windows, you ahve to pay big bucks.
21:49:14 <kc5tja> Nothing under $1K.
21:49:20 <thin> ah
21:49:25 <thin> you get simulation with icarus?
21:50:00 <kc5tja> thin: Icarus started off as a simulation tool.  It's now acquiring some synthesis capabilities, but I'm not interested in that.  I'll use Xilinx' or Cypress' free synthesis tools for that once I settle on a design.
21:50:16 <I440r> brb
21:50:20 <I440r> maybe :)
21:50:22 --- quit: I440r ("Leaving")
21:52:17 <kc5tja> Damn, I'm hungry again!
21:53:06 <Herkamire> kc5tja: what is it with you and food? Do you eat, like every day? ;)
21:53:22 <kc5tja> Yes, I do.
21:53:33 <kc5tja> I personally think I do have an eating problem.
21:53:45 <Herkamire> kc5tja: too much or too little?
21:53:46 <kc5tja> Though I'm not fat fat, I am nonetheless clinically obese.
21:53:53 <thin> argh it annoys me to see great projects started and usable programs are available for download then it stalls or something
21:54:05 <Herkamire> or perhaps, not the right stuff
21:54:16 <kc5tja> Herkamire: The "right stuff" doesn't fill me up.
21:54:22 <kc5tja> It doesn't satisfy.
21:54:25 <Herkamire> kc5tja: it's not the right stuff then
21:54:38 <Herkamire> fat/oils fills you up
21:54:39 <thin> the "right stuff" is protein, lots and lots of protein :D
21:54:40 <kc5tja> Herkamire: Vegetables and well-balanced meals aren't "the right stuff?"
21:54:44 <kc5tja> What crack are you smoking?
21:54:51 <kc5tja> I hardly consider Carl's Jr. the 'right stuff.'  :)
21:55:12 <Herkamire> this culture (US) doesn't know crap about eating healthy
21:55:14 <kc5tja> Or In-N-Out for that matter.
21:55:40 <kc5tja> Anyway, I'll be back in about 30 minutes.  Going to fast-food joint, 'cos nothing else is open.
21:55:44 <kc5tja> brb
21:55:59 <thin> the "right stuff" is 40-30-30 40% protein, 30% carb 30% fats % of calories per day. for a 220 pound guy 3000 calories is roughly where he wants to be..
21:56:19 <thin> actually you want to eat 1 gram of protein per pound of your body mass
21:56:34 <thin> more if you are doing lots of weight training
21:57:01 <thin> actually between 0.7 and 1 gram of protein for a regular person
21:57:11 <thin> so for me about 180 to 220 grams of protein a day
21:57:16 <thin> split up in meals
21:57:17 <skylan> Actually, my body tells me if I'm not eating enough to support its energy requirements.
21:57:20 <thin> 5 meals are better
21:58:18 <Herkamire> here's some good research: http://www.westonaprice.org/nutrition_guidelines/nutrition_guidelines.html
21:59:14 <thin>  Eat only foods that will spoil, but eat them before they do.
21:59:15 <thin> heh
21:59:19 <thin> i can't do that
21:59:21 <thin> i always let them spoil
21:59:22 <thin> heh
21:59:23 <Herkamire> Weston A Price studied native peoples, found they were very healthy, and studied what they ate
22:01:15 <thin> anybody know how to convert a shell account into a proxy or router or ppp thingie that lets me route through it with all my internet apps?
22:16:51 <kc5tja> Back
22:18:09 <thin> nobody knows eh?
22:18:28 <kc5tja> Nope
22:23:06 <Herkamire> thin: what are you trying to do?
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22:23:34 <Herkamire> thin: sounds devious
22:23:57 <I440r> were talking x86 again right ???
22:23:58 <I440r> hehe
22:24:16 <Herkamire> hehe
22:25:19 <thin> i guess what i'm looking for is a setting up a gateway on a computer except i'm connecting to it thru the net
22:25:22 <kc5tja> I440r: Not unless the dietary habits of devious, packet-routing native peoples is related to x86...
22:25:30 <thin> herkamire: yeah sure its devious, illegal, etc
22:25:47 <thin> heh jk
22:25:51 <I440r> heh
22:26:12 <thin> its something that i've had a bit of an interest in.. sometimes i want a proxy or something
22:26:17 <thin> but i haven't been able to figure out proxies
22:27:10 --- mode: ChanServ set +o thin
22:27:14 <kc5tja> The only way I know of is to encode PPP packets over the shell connection, and I'm not aware of any software designed to do that.
22:27:46 <thin> well there is SlurPP
22:27:48 <thin> er
22:27:52 <thin> slurppp or slurp
22:28:10 <kc5tja> hmm
22:28:16 <kc5tja> not familiar with it.
22:29:20 <thin> it let a person that could connect to the internet with non-ppp telnet into a machine that had slurppp set up and then you had ppp
22:30:32 <Herkamire> Slurp is an advanced passive NNTP client for UNIX.
22:31:40 <Herkamire> hmmm
22:31:45 <kc5tja> HAHAH!
22:31:49 <thin> nah its slirp
22:31:53 <thin> slirp ppp
22:32:01 * kc5tja just thought of a name for a kick-ass newsreader, should one be so inclined to write one.  INTP.  :D
22:32:07 <thin> lol
22:32:13 --- quit: ianp (Remote closed the connection)
22:32:16 <kc5tja> INTP: The Intelligent Choice.  :D
22:32:43 <thin> INTP = INTP N... T... P...
22:34:08 <kc5tja> INTP News Terminal Program.  :)
22:34:30 <Herkamire> :)
22:39:09 <kc5tja> DAMN IT, if only I can just figure out how to properly handle this tri-state bus problem, this UART receiver would be *working* by now...
22:43:23 <I440r> physically ?
22:44:06 <kc5tja> In Verilog.
22:44:47 <kc5tja> I can watch the bits being shifted into the receiver's shift register, and it IS getting correct data now (I fixed the garbage problem).
22:45:28 <kc5tja> But now, because the mask registers are being loaded with "undefined values" (because Verilog doesn't know a *driven* tri-state bus from a hole in the ground), I can never detect the end of a byte.
22:45:39 <kc5tja> So, the receiver keeps trying to receive data bits forever.
22:46:27 <kc5tja> s/Verilog/Icarus/
22:46:37 <kc5tja> If I had a commercial package, I'm quite sure I wouldn't be having this problem.
22:46:52 <kc5tja> I know I'm complaining, but it really is a problem for me.
22:47:21 <kc5tja> Having two independent input and output buses on each chip, with an external glue tristate buffer chip to combine the two is simply and utterly unacceptable to me.
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22:54:35 <thin> kc5tja: i might've stumbled onto something..  scroll to the bottom of http://opencollector.org/collector.php3
22:57:27 <kc5tja> OK, what about it?
22:58:04 <thin> eh i'm just googling no idea if thats something you want :P
22:58:17 <kc5tja> Nahh.
22:58:20 <kc5tja> Thanks though.
22:58:29 <kc5tja> There is something else on that page that a friend of mine pointed out (Confluence)
22:58:39 <kc5tja> But I'll play with that later.
22:59:08 <thin> do you want a link to "Linux LiveCD for EDA tools based on SLAX is now available featuring: sfl2vl, sfl2vh, Icarus Verilog, Alliance VHDL, GTKwave, etc. " ?
22:59:33 <thin> plus its got a sfl to verilog converter..
22:59:34 <kc5tja> ??
22:59:40 <thin> heh nevermind :P
23:00:47 <kc5tja> opencores.org is soooooooooooo ssssssssssslllllllllllllllloooooooooooooooooowwwwwwwwwwwwwwwww...........................
23:01:18 <kc5tja> I have to wonder how this site is configured, because it's obvious to me that it's webserver is apparently written in TI-99/4A BASIC, with all the high performance that brings too.
23:01:31 <kc5tja> Oh, and it has a Commodore 1541 for storage.
23:01:32 <kc5tja> Jeez.
23:01:49 <kc5tja> I submitted a search more than two minutes ago.  It's still loading the page.
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23:05:10 <thin> i wonder which cms opencores.org is using
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23:08:51 <kc5tja> I don't know.
23:09:05 <kc5tja> It has some vague similarities to SourceForge, but I can say for sure it's not SourceForge.  :)
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