00:00:00 --- log: started forth/04.04.01 00:14:13 --- join: ayrnieu (~julian@65.169.246.16) joined #forth 00:21:35 Dobry den, ayrnieu! 00:23:35 konnichiwa, asau 00:31:07 --- quit: yeoh ("User pushed the X - because it's Xtra, baby") 00:44:15 ayrnieu. You're not on the list. 00:44:28 --- quit: ayrnieu (Read error: 104 (Connection reset by peer)) 00:44:35 Take this: http://www.humanmetrics.com/cgi-win/JTypes2.asp 00:57:57 --- quit: kc5tja ("THX QSO ES 73 DE KC5TJA/6 CL ES QRT AR SK") 01:37:56 --- join: qFox (C00K13S@cp12172-a.roose1.nb.home.nl) joined #forth 02:10:44 Dobryjj den'! 04:00:20 --- quit: ASau () 04:22:59 --- join: ASau (~asau@158.250.48.196) joined #forth 04:24:12 --- join: Robert (~snofs@c-f55a71d5.17-1-64736c10.cust.bredbandsbolaget.se) joined #forth 04:55:26 anyone here familiar with the p24? 05:03:45 bbl 06:29:14 --- quit: ian_emacs (Remote closed the connection) 06:45:52 --- join: fridge (~hovil@CommSecureAustPtyLtd.sb1.optus.net.au) joined #forth 06:46:59 * fridge giggles at the topic URL 06:56:24 --- join: tathi (~josh@pcp02123722pcs.milfrd01.pa.comcast.net) joined #forth 06:56:52 --- quit: qFox (Read error: 104 (Connection reset by peer)) 07:00:37 I like that guys website 07:00:40 jackdoll 07:05:36 --- join: qFox (C00K13S@cp12172-a.roose1.nb.home.nl) joined #forth 07:12:26 --- quit: tathi ("leaving") 07:13:13 --- nick: chandler -> changler 07:19:20 --- quit: qFox ("if at first you dont succeed, quit again") 07:21:07 --- join: qFox (C00K13S@cp12172-a.roose1.nb.home.nl) joined #forth 07:22:26 --- join: warpzero (~warpzero@209.180.166.194) joined #forth 07:29:06 --- quit: skylan (Connection timed out) 07:45:19 --- join: ianp (~user@inpuj.net) joined #forth 07:56:22 --- quit: ianp ("ERC Version 4.0 $Revision: 1.645 $ (IRC client for Emacs)") 07:57:23 --- join: ian (~user@inpuj.net) joined #forth 08:03:35 --- nick: ian -> ianp 08:14:06 --- quit: qFox ("if at first you dont succeed, quit again") 08:17:01 --- join: qFox (C00K13S@cp12172-a.roose1.nb.home.nl) joined #forth 08:45:55 --- join: networm (~networm@L0626P01.dipool.highway.telekom.at) joined #forth 08:46:02 hi 08:46:35 --- quit: warpzero ("Tried to warn you about Chino and Daddy Gee, but I can't seem to get to you through the U.S. Mail.") 08:51:38 --- join: kc5tja (~kc5tja@66-91-231-74.san.rr.com) joined #forth 08:51:47 --- mode: ChanServ set +o kc5tja 08:52:26 hi kc5tja 08:53:07 * kc5tja yawns -- good morning. :) 08:55:47 terev 08:55:49 ve 08:57:37 I might do away with the synthesized sound generation in favor of DMA-based, wave-table sounds. 08:58:04 Problem is, I only have enough DMA channels for a single voice per channel. 09:00:56 * kc5tja isn't 100% sure yet on what to do though. 09:09:30 read-outloud program? 09:10:45 What? 09:15:20 like festival and recite 09:15:29 program that synthetises input text to speech 09:15:48 No. 09:16:01 Synthesis, like SID chip in Commodore 64, or Yamaha sound chip in many other computers. 09:17:02 And that is speech synthesis, not sound synthesis. The former is restricted to just speech, which would be pretty useless in a general purpose computer. 09:17:45 kc5tja: nice pic ;) 09:18:52 ianp: heh 09:22:29 --- join: Mark4 (~Mark4@64.47.44.254) joined #forth 09:23:02 kc5tja: *shrug* i haev no idea what any of that stuff is, but it looks cool. 09:23:26 I don't know either; none of it is mine, and it's definitely NOT the Kestrel. 09:23:51 kc5tja: ohhh lol 09:23:54 now it makes sense 09:24:02 Just look who posted it. :D 09:24:08 ah. 09:24:12 that explains it :){ 09:24:21 * kc5tja will post pictures when pictures become available 09:24:28 :) 09:28:44 Darn, I just realized I didn't make any provisions for *x240 video modes. 09:29:26 * kc5tja guesses he'll just have two sets of four bitplane pointers, one for even lines, and one for odd lines. 09:29:40 Each having their own modulo registers too. 09:33:22 * Robert just had a QSO with 2e0atz, a certain R. McDonald. :) 09:33:40 Stop clowning around. :D 09:37:45 Yes, master. Anyway, 4 ones so far today, on 80, 40 and 20m :) 09:38:09 Nice. 09:38:10 This last one had like a negative signal-to-noise ratio, heh. 09:38:31 Every time I call CQ on 40m or 10m, the two bands I easily have access to at the moment, I've gotten absolutely nothing at all. 09:38:38 :( 09:39:01 Seems like they hear me a lot better than I hear them. 09:39:13 Possibly some local noise source... I only use 5-10W. 09:39:16 It seems either nobody wants to talk to me, or my signal just isn't getting out. 09:39:33 Probably receiver sensitivity. 09:39:51 Or you live in an inherently noisy environment. 09:40:44 Or bad conditions :) 09:40:56 That too. 09:46:52 Well, I need to get to class. 09:47:13 OK, see you 09:47:28 --- quit: kc5tja ("THX QSO ES 73 DE KC5TJA/6 CL ES QRT AR SK") 09:50:25 --- join: thin (~thin@adsl-68-251-155-141.dsl.ipltin.ameritech.net) joined #forth 09:51:11 yumm.. fixedsys font! 09:52:02 and colors! 09:52:41 Hi t 09:52:48 ..here 09:53:40 hmm i wonder what a halfop is 09:58:28 less than an op, more than a noop 09:59:24 --- quit: networm (Read error: 113 (No route to host)) 10:00:15 --- join: networm (~networm@L0649P11.dipool.highway.telekom.at) joined #forth 10:04:21 --- join: madwork (~madgarden@derby.metrics.com) joined #forth 10:09:09 Greetings. 10:09:28 --- quit: thin (Read error: 60 (Operation timed out)) 10:13:15 anyone familiar with the p24? 10:21:55 --- quit: Mark4 (Read error: 104 (Connection reset by peer)) 10:29:30 guess i'll wait for kc5tja 10:32:38 What is is? 10:36:39 p24 cpu 10:37:12 http://www.eforth.com.tw/academy/sutra/chapter9.htm 10:38:35 I'm sure kc5tja has the spec memorized. 10:39:03 yep :) 10:39:07 :) 10:43:04 what's the ALU? 10:45:19 ? 10:46:34 there's a T and a S register, and i thought i had it all figured out, untill i had to do dup and over, and i dont get it. and i dont really understand the mul and div 10:50:38 geez haven't these people heard of a

tag
10:51:22 firefox, dillo and w3m do not display that diagram so that anything lines up
10:51:46 oh i noticed
10:51:52 qFox, do you have an emulator for this?
10:51:56 i'm writing one
10:51:59 Ahh.
10:52:05 but i dont get those registers :\
10:52:17 at first i thought they were merely the stack counters
10:52:25 but then i wanted to do dup and over
10:52:28 and it all stopped making sense
10:52:33 but they cant just be tos
10:52:36 :S
10:59:59 there are still a few bumps, but the main processor isnt very hard i think
11:00:18 just a set of variables for all the registers, which is limited for the p24
11:01:10 and a case statement (ok just a bunch of if's) for each function/command/opcode/whateveryouwannacallit
11:01:31 emulate what the cpu should do (change registers, change stackpointers etc), and that part shouldnt be very hard
11:06:34 qFox: use a jump table
11:07:01 BTW this: Usage: 000001 xxxxxx xxxxxx xxxxxx
11:07:02 cccccc 000001 xxxxxx xxxxxx
11:07:02 cccccc cccccc 000001 xxxxxx
11:07:02 cccccc cccccc cccccc 000001
11:07:29 yes wth is that :\
11:07:32 is just a roundabout way of saying that the opcode (000001 for RET) can go in any position in the word
11:07:55 oh, well i havent really figured out the reasons why those must go in specific words, but i wont have to worry about that
11:08:01 cccccc represents an instruction that will be executed. xxxxxx represents one thaht will not (because it's after RET)
11:09:27 they don't have to be in specific words. each line in the table above is ONE word
11:10:35 so that just indicates in what place in teh word the command can go
11:10:40 so i can just ignore that :)
11:10:47 because that doesnt really matter for me
11:10:48 each word has 4 instructions in it. The diagram is saying that RET can be the first, seccond, third or fourth instruction in a word
11:10:58 i'll keep the order in which its listed on that page, works for me
11:11:33 you have to support RET at any position
11:11:41 it doesnt matter for me
11:11:45 i only process opcodes
11:11:59 if ($1 == 01) { do ret stuff }
11:12:10 right. and you have to process the ret opcode at any position within the word
11:12:11 if ($1 == 00) { do jump stuff }
11:12:33 yea i'm not quite sure how to go on once the cpu emulator is done, but i'll cover that when i get there :)
11:12:59 cool
11:13:14 what language/environment are you writing the emulator in?
11:13:20 mircscript :)
11:13:26 lol
11:13:31 really :)
11:13:40 i'll use binvars for memmory space
11:13:55 that way i can somewhat emulate a memmory environment (mirc cant access the mem directly)
11:14:42 Herkamire
11:14:45 in
11:14:45 http://www.eforth.com.tw/academy/sutra/chapter9.htm
11:14:52 can you go to the definition of DUP
11:14:56 "Duplicate T register and push it on the data stack"
11:15:05 and explain me that one?
11:15:52 explain what part. you know what dup does
11:16:00 yes but not the way its explained there
11:16:02 doesnt make sense
11:16:04 T is the Top of stack item
11:16:04 but hold on
11:16:08 somebody else is trying ...
11:16:11 it is?
11:16:14 T is a register
11:16:18 holding TOS
11:16:35 then what is S?
11:16:45 the next item down in the stack
11:16:49 I tihnk
11:17:03 yeah
11:17:13 hm are you sure about that?
11:17:17 so stack is: x x x x S T
11:17:22 (T being held in a register)
11:17:34 yes. look at definition of OVER
11:18:00 yes that didnt make sense either :p
11:18:04 it says to put S into the T register.
11:18:09 you first push T to... A ?
11:18:10 then S to T
11:18:14 then A to s?
11:18:14 and push the old value of T onto the data stack
11:18:15 or...
11:18:15 :s
11:18:29 (when they say push in this case they mean the whole stack except the T register)
11:18:51 no A
11:19:00 I hope...
11:19:00 euh
11:19:19 no, it doesn't say anything about A
11:19:27 no but it doesnt make sense either
11:19:50 either they both move at the same time, or T is pushed first, and then S copied to the T register
11:20:05 or whatever. it doesn't matter, that's an implementation detail
11:20:06 that would cause dup.
11:20:10 nonono
11:20:13 i disagree
11:20:19 this is a cpu spec, no implementation spec
11:20:34 every cpu should be the same
11:20:35 the behavior of the system is clearly described. it doesn't matter how it works with transisters and stuff.
11:20:38 or behave the same
11:20:41 so long as you know what it DOES
11:20:57 the behavior is well specified
11:21:04 yes maybe so, but the registers should be what they should be
11:21:12 i can just dup the stack and not bother about registers
11:21:19 but thats not the objective here
11:21:25 sure you can
11:21:34 this is hardware
11:21:39 i want to do a dup, and have the resulting registers the way a real cpu would have them after the same instruction
11:21:51 but ok
11:22:05 you are POSITIVE that the T is tos, and the S is sos?
11:22:11 yes
11:22:15 alright
11:22:27 and the R is the TOS of the rstack?
11:22:44 look at the short descriptions of xor and add etc
11:22:53 yes
11:23:50 R Top of Return Stack
11:23:51 S Top of Data stack
11:23:51 T Accumulator for ALU
11:24:06 yea but that ALU thing just ticked me off
11:24:17 I don't understand the "Accumulator for ALU" stuff, but I understand the descriptions of ADD, AND etc
11:24:21 it doesnt really make sense to me that the TOS is also the math register
11:24:37 what?
11:24:48 TOS is the only place you can do math
11:25:11 the result of math is always placed in TOS
11:25:27 yes but like a "normal" 86 cpu has ax bx cx dx etc
11:25:41 anyways
11:26:00 if T S and R are real stack items, and not counters or pointers, i need to rescript some parts :p
11:26:33 i asumed the S and R were counters that indicated where the TOS was
11:26:39 btw
11:26:40 ahhh :) ALU means "Arithmetic Logic Unit"
11:26:51 yes but that means squat to me
11:26:51 :)
11:26:52 --- nick: changler -> chandler
11:26:54 there is nothing "normal" about x86
11:27:02 well by now i figred out that its the mathematical processor
11:27:19 hey, is the stack part of the cpu hardware wise?
11:27:23 no, R, S and T are registers holding stick items
11:27:24 or is it in the memmory?
11:27:34 on CPU
11:27:37 ok
11:27:42 so where does SP@ lead to?
11:27:50 there is no SP@
11:27:59 i mean in forth
11:28:15 doesnt that return the top stack pointer?
11:28:18 address i mean
11:28:20 SP@ only makes sense in forths that have their stack in memory. the p24 does not
11:28:28 ahhh ok
11:28:35 i thought it was a standard
11:28:37 oki
11:28:45 then i can keep my stack the way it is
11:28:48 standard shmandard
11:29:09 chuck doesn't care much for forth standards.
11:29:15 he's into innovation
11:29:42 --- nick: chandler -> chineualdler
11:29:43 i like standards. something to work to
11:29:51 --- nick: chineualdler -> chandler
11:30:04 like random? :)
11:30:11 makes things a bit more portable imo
11:30:19 especially in systems like forth
11:30:24 but ok
11:30:27 chuck also doesn't give a hoot about portability
11:30:31 i'll go rescript my thing
11:30:54 he thinks (roughly) that portability means good documentation, and simple code, so that people can easily rewrite the whole thing for another platform
11:31:10 wouldnt it be nice
11:31:24 wouldn't what be nice?
11:31:25 if i could just give my code with standard words
11:31:40 to someone on a sparc, on a mac, on a intel
11:31:43 and it would instantly work?
11:31:53 without having to adjust it to implementation specs?
11:32:00 so writet it in C
11:32:01 like you had to adjust random in set
11:32:04 fuck c
11:32:05 :)
11:32:05 and be careful about endian
11:32:11 same problem
11:32:13 or java, or python etc
11:32:14 not standard
11:32:18 but w/e
11:32:29 not my job to go riot about this :)
11:32:44 phoey now i can go start all over again
11:32:46 what's not standard?
11:32:53 nevermind
11:33:09 write it in gforth
11:33:52 no forth has standards. forth has ansi and fig79 81 83 etc?
11:49:09 oh right
11:49:10 and another thing
11:49:22 thats consufing me big time
11:49:40 wtf is that 25th bit? bit 24, the sign
11:49:52 that page keeps talking about a carry flag
11:50:00 but is it a register? or is it just the 25th bit of the T register?
11:50:12 do all the registers have 25 bits or just the T and S?
11:50:29 is the carry flag only decided by the 25th bit of the T register?
11:50:39 etc...
11:50:40 :)
11:51:45 like when i move a number from T to .... A, should i AND it with a 24bits 1's first?
11:51:56 or just move the whole number
11:52:39 i'm already gonna put the 24 or 25bit (whatever it is) limitation in, as far as number input, since mirc is obviously way bigger
11:55:04 [21:50:26] is the carry flag only decided by the 25th bit of the T register?
11:55:04 [21:50:37] etc...
11:55:04 [21:50:37] :)
11:55:04 [21:51:43] like when i move a number from T to .... A, should i AND it with a 24bits 1's first?
11:55:04 [21:51:53] or just move the whole number
11:55:05 [21:52:36] i'm already gonna put the 24 or 25bit (whatever it is) limitation in, as far as number input, since mirc is obviously way bigger
11:55:09 euh sorry
12:14:36 :)
13:19:28 Herkamire
13:19:37 on that p24, what does jump exactly do?
13:19:42 register wise i mean...
13:25:40 it's a branch
13:26:01 it changes the P and I registers
13:27:04 and what does it take as its source?
13:27:17 A?
13:29:53 the rest of the word with the JUMP instruction in the top bits
13:30:11 jump can only apear first in a word
13:30:18 so the top 6 bits are 000000 for JUMP
13:30:38 then the rest of the bits specify the address to jump to (relative to the current 256K page
13:30:56 oooh right
13:31:12 big endian or little endian?
13:31:19 what?
13:31:27 oh wait thats the scheme
13:31:39 which suddenly makes sense, heh :)
13:31:57 000000 aaaaaa aaaaaa aaaaaa
13:32:05 what means address 1 ?
13:32:22 000000 aaaaaa aaaaaa aaaaa1 or 000000 1aaaaa aaaaaa aaaaaa
13:33:19 rightmost bit has least significance I think
13:33:24 k
13:34:01 I've deduced this from them saying that the RET instruction has opcode 1, and in the diagram they show the bit pattern as 000001
13:34:22 oki
13:34:40 I've never worked with little-endian, so maybe I'm just confused
13:54:32 I'm still a little confused about this, but I didn't think endian had to do with what order the bits go in
13:54:43 just how thy Bytes are stored in memory
13:55:02 i am a bit confused by the whole thing to be honest :)
13:55:23 x & 0x000000ff is going to get you the 8 least significant bits regardless of platform. I THINK
13:55:53 but by the looks of it, the instructions that take none, or a 24bit number as argument can have 4 variations?
13:55:58 Usage: 001011 cccccc cccccc cccccc
13:55:58 cccccc 001011 cccccc cccccc
13:55:58 cccccc cccccc 001011 cccccc
13:55:58 cccccc cccccc cccccc 001011
13:56:25 it's still the same instruction
13:56:33 001011000000000000000000 = 000000001011000000000000 = 000000000000001011000000 = 000000000000000000001011
13:56:39 no
13:56:53 in that diagram, cccccc is representing some other instruction
13:56:58 oh
13:57:01 oooh
13:57:14 the cpu processes the numbers per 6 bits
13:57:22 no instructions
13:57:38 each 24bit word of instructions, contains 4 instructions
13:58:03 (6 bits each)
13:58:10 what about ldi?
13:58:21 Usage: 001010 cccccc cccccc cccccc
13:58:23 nnnnnn nnnnnn nnnnnn nnnnnn
13:58:23
13:58:28 it puts a number on the stack
13:58:35 the number comes from the next instruction WORD
13:58:58 it puts nnnnnnnnnnnnnnnnnnnnnnnn on the stack
13:59:06 then the processor continues to execute cccccc
13:59:19 oh thats why it can only be the first slot of the word
13:59:29 no
13:59:42 what if there are two ldi's in one word?
13:59:58 damnit suddenly this becomes alot more complicated :\
14:00:20 ldi can be in any slot
14:00:29 jump has to be in the first slot
14:00:42 because the next three slots are the address..
14:00:55 JUMP uses the remaining 18 bits from the same word.
14:00:58 but what happens if there are two ldi's in one word?
14:01:02 ldi uses all 24 bits of the NEXT word
14:01:29 LDI increments the P register, so the next LDI would use the next word after that
14:01:34 example:
14:02:57 00101 010111 00101 010111
14:03:06 xxxxxxxxxxxxxxxxxxxxxxxx
14:03:08 yyyyyyyyyyyyyyyyyyyyy
14:03:15 more code....
14:03:21 hmmmm
14:03:30 first word contains 4 instructions: ldi add ldi add
14:03:37 ok..
14:03:47 as the computer is executing first word, the P register points to seccond word
14:04:06 the first LDI loads xxxxxxxxxxxxxxxx and puts it on the data stack (into the T register bla bla)
14:04:12 and increments P to point to the third word
14:04:19 then it executes the add instruction
14:04:31 so once that word has been processed, the p is decreased?
14:04:31 then the seccond LDI loads yyyyyyyyyyyyyyyyyy and pushes it to the datastack/T
14:04:40 and encrements the P register.
14:04:43 then the ADD
14:05:20 then the cpu loads 4th word for more instructions (since that's where P is pointing). then increments P, then continues executing instructions
14:05:33 no, P is never decremented.
14:06:01 well yea but hmmmmmmm
14:06:08 trying to visualize it
14:06:21 in that example
14:06:35 it starts with the P pointing to the address that contains 00101 010111 00101 010111
14:06:58 it then processes that word, per 6 bits, and will continue to process it, no matter what P is?
14:07:21 when the CPU loads 00101 010111 00101 010111 it increments P immediately
14:07:30 for the next word
14:07:36 hm yea ok
14:07:53 right. it loads 00101 010111 0101 010111 into I
14:07:54 I think
14:07:58 and I is the word its currently processing?
14:08:00 right
14:08:16 is it the actual word or a pointer to or the address?
14:08:17 clever huh :)
14:08:26 never really looked at it that way
14:08:36 maybe a complicated, but efficient yes
14:08:45 a bit.
14:08:48 I think I contains the actual word
14:08:56 alright
14:09:07 that kind means i have to do things TOTALLY different
14:09:16 but it answered a few questions i would've had later :p
14:09:19 it would probably be easiest to shift it down every time you use an instruction from it
14:09:32 nah i can use bitmasks
14:09:49 ; 11 = SHL
14:09:49 if ($1 == 11) {
14:09:49 ; $and it with 24 bits later (to make sure the 24th bit is dropped)
14:09:49 %t = $calc(%t * 2)
14:09:49 }
14:09:50 ; 12 = SHR
14:09:52 if ($1 == 12) {
14:09:54 %t = $floor($calc(%t / 2))
14:09:56 }
14:10:01 those are my shifts, because mirc has no internal shift function :)
14:10:17 its ugly but it works
14:10:31 (obviously this emulator wont win any speed prices :p)
14:10:48 I don't see the shifts
14:11:00 *2 is shr isnt it?
14:11:16 and \2 drop remainders is shl, right?
14:11:20 *2 would shift left by one
14:11:27 unless it's negative
14:11:37 euh lol, you're right
14:11:56 anyway, it's not going to == 11 unless you shift and mask first
14:12:13 what do you mean?
14:12:27 you have if($1 == 11)
14:12:32 yea well
14:12:35 I'm asuming that $1 is your instruction
14:12:40 that was before this whole thing came appearant to me :p
14:12:41 aye
14:12:48 i totally misunderstood the whole concept
14:12:59 you should shift I down each cycle
14:13:02 i'll have to rewrite it, completely aware of that :)
14:13:12 and always mask it with 111111
14:13:31 well, shift it after.
14:13:33 and not quite sure now, because i have to decide on how to do memmory as well
14:13:46 but i'll figure it out
14:13:58 so after the first three instructions of a word you shift down, and after the last you fetch from P and increment P
14:14:02 that carry bit is confusing too
14:14:12 is the T the only register with a 25th bit?
14:14:30 no, it says right at the top that all registers are 25 bits and preserve the carry bit
14:14:47 but I don't think the stack preserves it
14:14:52 not sure on that point
14:14:55 yes but when moving around its mentioned that 24 bit words are moved around
14:14:56 not 25
14:15:43 yes
14:15:55 or... what do you mean by moved around?
14:15:57 damn, you know, and i had it all figured out this morning :p
14:16:12 you had what figured out?
14:16:17 this, the p24
14:16:24 except for some minor details
14:17:45 heh
14:28:04 hm
14:28:08 --- quit: fridge ("Leaving")
14:28:08 this might sound a bit stupid
14:28:15 but is the memmory then also 24bit?
14:28:27 --- quit: networm ("Client exiting")
14:28:33 oh thats just cells...
14:28:45 3 bytes
14:29:19 memory is 24 bit I believe
14:29:38 there is to c!
14:30:28 and um, that carry flag, if a number, say e> there is to c!
14:30:29 510000000000000000000
14:30:36 hu
14:30:37 :s
14:30:54 and um, that carry flag, if a number, say 524288 or 10000000000000000000
14:31:02 is the 1 copied to the 25th bit?
14:31:13 instead of actually being part of the number?
14:31:30 so say the number is 10000000000000000000 , the register would actually contain 110000000000000000000 ?
14:38:41 --- join: skylan (~sjh@vickesh01-4708.tbaytel.net) joined #forth
14:40:15 I don't know
14:56:11 I'm guessing the only thing the carry bit has anything to do with is the JNC instruction
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15:02:49 yes i wouldnt know anything else iether
15:04:17 heh you know what
15:04:23 those diagrams on that page
15:04:33 they actually look like diagrams on my laptop, win98
15:04:35 se
15:04:46 ie 5.0
15:04:56 how... stupid :)
15:31:20 hey
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16:02:56 qFox: the spacing is probably just right in the default winblows font
16:45:44 any other forth videos about apart from ultratechnology?
16:49:22 forth videos?
16:49:28 dancing chunk moore, etc? :)
16:52:40 well, look at http://www.ultratechnology.com/rmvideo.htm for yourself and see
16:52:55 his OKAD demonstration is rather impressive
16:52:56 so I thought
16:53:40 http://www.ultratechnology.com/okad2.rm ?
16:54:10 it was a part of tape1.mpg
16:54:19 I'm not sure if it is replicated in okad2.rm
16:54:27 I haven't seen any of the realmedia files
16:54:42 oh, mpg! excellent
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16:58:24 Herkamire> actually its not in xp, ie6
16:58:28 but its an older document
16:58:38 kinda stupid that he spaced it specific to that though
16:58:50 whoever made it never heard about or similar :\
16:59:14 the script is coming along anyways :)
16:59:54 lol... doing /fload in mirc now :p
17:00:20 (no thats not right)
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17:04:29 http://jpb.forth.free.fr/Anglais/encadrement.html
17:06:30 nice
17:07:49 kind of an ugly site if you ask me
17:08:45 HAHA
17:09:03 maddox changed his site for April Fool's!
17:09:05 http://maddox.xmission.com
17:09:53 358 hits the last minute??
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17:26:48 --- mode: ChanServ set +o kc5tja
17:27:15 Potassium is *awesome* stuff. I wish I had a bottle full of it here at the house. :)
17:28:58 Everytime I would ever need entertainment, I'd throw one 10mg sample into a jar of water. The reaction is *most* impressive, and amazingly docile in such small quantities. But it generates an *immense* amount of hydrogen gas *really* fast, and ignites it too. It has the most beautiful flame.
17:35:31 every pyro's dream.
17:37:24 Heh
17:37:42 I just want 10mg pellets. That's all. Anything larger, and the reaction will probably get rather out of control.
17:38:25 Sodium is pretty darn cool too, but the reaction doesn't get hot enough to ignite the hydrogen.
17:38:48 So it just produces a ton of hydrogen gas, which you can use to, say, fuel your car with (assuming you had proper fuel lines for it).
17:39:19 the cool part of chemistry ;)
17:39:34 This is the basis behind "Power Balls," one company's means of transporting hydrogen gas for fuel consumption as NaH compounds, which reacts with water to form NaOH and H2.
17:40:44 My question is how they managed to get NaH though; Na and H are in the same group on the periodic table, and my current information (which is obviously limited) suggests that they wouldn't react with each other to produce the compound.
17:42:13 yay my cpu emulator can do ldi :p
17:42:18 seemingly properly
17:42:57 SHIT! IT'S RAINING!
17:43:02 * kc5tja goes to cover up his car's sunroof.
17:43:05 lol
17:43:10 run forest run :p
17:44:18 Done.
17:44:25 I put my bath towel over it.
17:45:03 * kc5tja needs to get that sunroof fixed. But I don't have a freakin' penny to my name to do it with.
17:45:09 kc5tja> you're familiar with the p24 right?
17:45:28 No, never used one.
17:45:34 oh, damnit
17:45:50 I am familiar with the P21's instruction set, but I've never used a P21 either.
17:46:51 well maybe you can answer it anyways :) it uses 25bits registers, but the 25th bit is the carry flag. would it copy the 24th bit to the 25th bit every time? so like binary 100000000000000 would actually be 1100000000000 in register T
17:47:01 ( http://www.eforth.com.tw/academy/sutra/chapter9.htm )
17:50:54 Can you give me a little more context to answer your question with?
17:51:25 if you look at the instruction definitions, especially the JNC, it uses that carry flag
17:51:47 the registers are 25 bits
17:51:49 Yeah, so?
17:51:53 * kc5tja understands that.
17:51:56 but only 24 bits are used
17:52:11 is the 25th bit a copy of the 24th bit?
17:52:15 Stack operations are 25-bits long.
17:52:24 But you can directly only load in 24 bits.
17:52:31 No. It's a real, honest to goodness, 25th bit.
17:52:43 It is, as the documentation says, a carry bit.
17:53:08 yea but its a bit confusing
17:55:07 it's like having 16-bit registers, but only being able to load in the lower 8-bits.
17:55:25 hm ok
17:55:29 that makes sense
17:55:31 You can still use the extra bits via other operations.
17:56:04 well he with some instructions preserves the carry flag while clearing or moving the register
17:56:06 For example, to load in -1 in the P24, you would execute LDI 0, COM (which sets all 25 bits as a result, thus producing a true -1).
17:56:13 so it was confusing to me
17:57:08 Not sure about the P24, but I know the P21's # instruction (LDI in P24) *cleared* the carry bit when loading its 20-bit value.
17:57:23 p24 too
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17:58:00 trying to create a p24 emulator in mircscript :p
17:58:00 So to get a true negative number, you had to do something like 2* 2/ to make sure the carry bit was set to the proper value, OR, load the 2's compliment (minus 1) value into the register, then execute COM to flip all the bits.
17:58:07 its actually coming along quite nicely.
17:58:22 ldi works properly for as far as i can see, i think jump is too but i cant really test yet :)
17:58:24 Oops, that should read 2's compliment value (plus 1).
17:59:14 or set the 24th bit and shl
17:59:31 Well, that's what 2* (SHL) and 2/ (SHR) do.
17:59:38 right :)
17:59:57 The phrase 2* 2/ ought to "sign extend" the 24-bit value to 25 bits.
18:00:03 Assuming 2/ is a proper arithmetic shift.
18:00:12 If it's a logical shift, it won't work, because it'll shift in zeros.
18:00:50 according to the specs, unless i'm wrong, the p24 does shift in 0's
18:00:53 with shl
18:01:11 Who cares about SHL?
18:01:20 It's SHR that does division by two.
18:01:37 yes but..
18:01:48 SHL == 2* -- you WANT 0s to be shifted into the lower bits.
18:01:57 SHR == 2/ -- you WANT the sign to be preserved here.
18:02:09 oh like that. ok ic
18:02:40 kc5tja: check out http://maddox.xmission.com today :)
18:07:17 Sonarman: I never want to see that URL anywhere on this channel again.
18:07:18 Ever.
18:07:37 He is the supreme prime minister of the planet Retardia.
18:07:51 It's clear he also speaks native Retardic LOLOL!O!L!lo!!1!!1
18:08:16 Camaro? A real car? HAHAHAHAHAHAHAHAHAHAHA!
18:08:19 That is *SO* laughable.
18:09:23 Without even getting into power-vs-weight issues, I *challenge* him to race his Camaro against a bone stock Mazda RX-7. Bone stock. No "ricer mods" needed. I will lay $50 that says he won't win. No fuckin' way. Not when a bone-stock '94 RX-7 will give a ZO-6 Corvette a taste of its own exhaust.
18:09:44 kc5tja i wouldnt make too much of a fuzz about it... ;)
18:10:29 As a person of intelligence, I am truely and unabashedly *insulted* by these kinds of people.
18:10:44 Here is the future of America, folks. Look upon thee, my friends, and gasp in terr..admiration.
18:11:06 I mean, c'mon -- Donald Duc...Rumsfeldt is his person hero.
18:11:27 A *loser* who can't even run an oil company successfully, and he's someone's highest role model.
18:11:44 I just wanna say, "Wake up, fucktard, and smell the god-damned horseshit in your coffee."
18:12:00 And that's the last I'll say on that topic.
18:14:45 kc5tja: today his site is in "April Fool's" mode
18:14:57 i tried to warn you :p
18:15:01 come on, Samuel!
18:15:18 I've seen his site before.
18:15:26 When it wasn't in such a mode.
18:15:34 And, frankly, I don't notice a significant difference.
18:16:07 Ok. well, i find his site hilarious in whatever mode, even if few of his opinions can be agreed with :)
18:16:29 If I were his parents, I'd have him euthanized.
18:16:41 lol
18:16:53 That boy has a jail sentence coming to him, and mark my words, that's where he'll stay.
18:17:56 he actually despises Donald Rumsfeld, and thinks that Camaros are a joke! it's a satire!
18:21:47 hello, all
18:29:10 yay, my jump and ret's work :)
18:38:52 should JZ eat the TOS if its not zero?
18:39:24 looking at that question i guess i can answer that myself
18:39:35 its just explained odd
18:40:06 Neither JZ nor JNC consume the TOS.
18:40:26 then i'm reading that guide all wrong
18:40:35 Conditionally jump to the 18 bit address in the bit field 17-0 in the current 256K word page of memory, if the T register contains a 0. It must be in slot 0 of a word.
18:40:35
18:40:35 The T register is destroyed and the data stack is popped back to T. This instruction is different from JNC, which does not pop the data stack and removes T.
18:40:45 the first part i understand
18:40:51 the second part i dont, then.
18:41:10 WHOA.
18:41:12 the T register is the TOS, we established that earlier.
18:41:32 The JZ instruction *consumes* the TOS????
18:41:35 That's *weird!*
18:41:41 ok at least i read it right
18:41:52 In fact, that's just plain *wrong*. :)
18:41:58 heh well those are the specs
18:41:58 I wonder why Ting made THAT decision.
18:42:30 my first time doing such a thing so its all the same to me really :)
18:43:05 Well, it's just a little bit weird; it takes less logic to NOT consume the stack in most cases.
18:43:19 i'll take your word for it
18:45:10 btw the JNC doesnt consume the tos
18:45:36 Yes, so it says above.
18:45:41 oh right
18:45:50 But the fact that they work completely differently is just . . . strange.
18:45:51 Weird.
18:45:54 Unexplainable.
18:46:01 perhaps that is the reason?
18:46:05 We're talking total Illuminati-level conspiracy theory stuff here.
18:46:09 hahhaha
18:46:11 haha
18:46:17 damn, dude..
18:46:40 I'm serious -- all of Chuck's chips DO NOT consume the stack when executing a conditional branch instruction.
18:46:53 That's why ColorForth's IF statement doesn't consume the top of stack.
18:47:10 that would've taken me some time to figure out then...
18:47:24 Once you're aware of it, it makes sense.
18:47:52 well, it saves you a drop after most if statements
18:48:09 dont you want to drop the flag in most cases?
18:48:46 qFox: I find that it's about 50/50.
18:49:03 then it doesnt really matter either way ;)
18:49:12 For as many IF statements that I consume the flag with, there is about the same amount of IF statements where I don't.
18:49:24 qFox: Right. That was Chuck's assessment.
18:49:30 oh, ok
18:50:16 I do find that I use -IF a lot too (JNC basically, in P24 lingo).
18:50:33 Especially when running inside of loops.
18:51:06 Maybe that's the reason they work differently in the P24; JZ is optimized for consumable boolean YES/NO flags, while JNC is optimized for use in loops.
18:51:24 But I still think it's wasted logic to consume the flag on a JZ instruction. :)
18:52:12 hm
18:52:20 what is the difference between CALL and JUMP ?
18:52:36 JUMP changes the program counter to the next instruction to execute.
18:52:53 CALL does the same thing, *BUT* it also preserves where it left off, so that you can RETurn to it.
18:53:15 Hence the name "Return Stack."
18:53:16 it seems that jump also pushes the P on the return stack though
18:53:30 Oh?
18:53:39 or
18:53:48 i misinterpreted that one
18:53:49 oki
18:53:50 :)
18:54:06 ohwell guess that makes CALL an easy one :p
18:55:58 hmmm, cant you somehow get the program counter to the return stack by other instructions?
18:56:26 because if you can, you can do that, then jump to do a call, and then you'd have one less instruction...
18:56:27 No.
18:56:30 oh
18:56:32 pity :)
18:56:55 ?? How does that reduce an instruction?
18:57:01 You have one CALL, followed by one RET.
18:57:11 call is the same as jump, except it pushes P to R?
18:57:36 Otherwise, to make a call, you'd need to LDI the return address, PUSH it to the return stack, then JUMP to the subruotine, where it finally executes RET to return. 2 instructions versus 4.
18:58:04 well i wasnt talking optimization though
18:58:23 there's no - either...
18:58:29 qFox: Well, read what it does: it pushes the address of the following instruction onto the return stack, then starts executing instructions at the desired target address.
18:58:38 yes i understood
18:58:39 but i mean
18:59:06 they tried to lower the instructions to as few as possible
18:59:59 Yes, but there is a point where if you reduce too far, you impact performance in a negative way.
18:59:59 i'm just saying that if they were going for that, you _could_ drop CALL if you can put the P to the return stack...
19:00:16 You don't want to put the P on the return stack anyway.
19:00:19 it's *constantly* changing.
19:00:40 uhm yes... but doesnt call do that?
19:00:53 You want to have the program load a constant, transfer it to the return stack (thus doing in software what the hardware would otherwise do; in this case, the constant loaded is the address following the JUMP instruction).
19:01:12 When CALL is executing the P register has a known value.
19:01:23 It just transfers it directly to the R stack.
19:01:35 hmmmmm ok i see your point
19:01:40 If, however, I execute the following hypothetical code:
19:01:44 PUSHP
19:01:46 JMP foo
19:01:53 ; note: foo won't return here!
19:01:55 sorry i still have to get used to this way of looking at a cpu, its all very new to me :)
19:02:27 This is because PUSHP will push the address of JMP, not what follows JMP.
19:02:36 this morning i was quite clear on how the p24 worked, and my view on it now is entirely different from what it was this morning :p
19:02:42 (the sole exception being when PUSHP and JMP appear in the same instruction word)
19:02:59 yea i understand
19:03:10 but for the p24 jmp must be in the first slot
19:03:23 6 bits for the instruction and 18 bits for the adr, so thats impossible
19:03:32 Right.
19:03:38 i do learn :)
19:03:49 And realistically speaking, PUSHP is itself another instructino, so you may as well go with a CALL instruction anyway.
19:03:49 (didnt know this stuff this morning)
19:04:34 The alternative is to use LDI and PUSH, which already exist in the instruction set. But remember, each one takes a clock cycle to execute.
19:04:42 yea but p24 has space for only 32 instructions, where i think you have a "free choice" for the last one
19:04:47 So LDI, PUSH, JMP consumes 3 cycles, followed (eventually) by a RET -- so a total of 4 cycles.
19:04:53 With CALL and RET, it's only 2.
19:05:01 i understand
19:05:20 64 instructions actually; they're 6-bit opcodes.
19:05:36 yes but the upper instructions were system or something
19:05:45 not sure
19:05:58 I didn't get that from the specs you posted.
19:06:06 But even so, only 28 instructions are used of the 64 allowable.
19:06:09 Plenty of room.
19:06:16 (and that's 28 including the CALL)
19:06:47 There are 64 possible instructions in a 6-bit field. Half of these are reserved for user applications. Only the lower 32 instructions are specified in P24. These instructions consist of four classes:
19:07:21 hm, what kind of instructions would the upper half be then?
19:09:17 my script will be so slow compared to the real cpu :p
19:11:14 Whatever you want them to be; hence, "User defined." :
19:11:15 :)
19:11:24 no the upper half
19:11:34 My answer stands.
19:11:35 oh
19:11:44 you mean the lower is bound by those specs
19:11:52 and in the upper you can do whateverthehell you want?
19:12:01 "bound"
19:12:05 That's what "user defined" generally means. :)
19:12:16 heh perhaps but i'm new to this :)
19:12:19 I had a friend of mine invent a neat stack engine once.
19:12:38 For his college course, they had to design a custom 8-bit CPU that did some kind of sort on data.
19:13:04 All but one of the students (in particular, my friend Billy) made traditional register-to-register or accumulator type CPUs to do the job.
19:13:08 And they mostly worked.
19:13:49 Billy, however, made a stack CPU to do the job, and had one specialized instruction: SORT. It did a "perfect shuffle" sort, in one clock cycle. Since he had to sort 16 bytes worth of data, he had to sort 4 times (since a perfect shuffle is a power-of-two type of sort).
19:14:07 So in 4 clock cycles, he had achieved what, literally, the rest of the class couldn't do in 160.
19:14:24 :)
19:14:39 And he still had a fraction of the gates invested in the design.
19:15:03 He came --><-- that close to failing that assignment, until the instructor was "enlightened" about stack architectures being valid CPU designs.
19:15:13 lol
19:16:28 i'll tell you, that i'll be happy when this emulator is running smoothly, and i'm done defining the words in CODE
19:16:42 then i wont have to look back at this part and can just focus on the forth part :)
19:17:09 i dont think i'll even bother creating some kind of assembler
19:18:01 and i dont need an optimizer, because face it, this thing is sure as hell not meant to be speedy....
19:18:25 but if it'll work in the end, it'll be pretty unique. a fully functional forth in mircscripting
19:21:19 Well, when programming in Forth on a Forth CPU, what is the assembler? :)
19:21:27 exactly
19:21:44 :)
19:22:22 but i mean i'll define those core words in machine language, rather then (better) "readable" code
19:22:47 well, FTS/Forth for x86 doesn't have an assembler either.
19:22:56 I inline basic primitives using , and friends.
19:23:24 It's a lot more inconvenient to do for x86, but the basic principle works well enough to get a Forth system working.
19:24:20 You see a lot of compiler words like, : + $xxaabbcc , ; or somesuch.
19:24:38 (where $xxaabbcc is some hexadecimal constant that happens to be valid x86 opcodes)
19:26:50 hmmm
19:27:14 the LD and ST instructions, do they store and retrieve a byte or a 24bit number?
19:27:30 at first i thought a byte, but now i'm a bit confused
19:27:46 A whole stack cell, so in this case, a 24-bit number.
19:27:53 oh damn
19:28:03 that'll look ugly then :)
19:28:15 but how do you get words like C@ and C! ?
19:28:46 Well, there are two answers to that question.
19:29:05 Since The P21/P24 are word-addressed machines, there is no concept of an 8-bit byte.
19:29:13 Indeed, one can say that these are 24-bit byte machines.
19:29:26 Well, the P24 is anyway; the P21 is a 20-bit byte machine.
19:29:29 ok...
19:30:09 So the only way to store smaller quantities is to read a word, bit-bang it (AND with a mask, XOR in the new value [properly shifted into place of course]), then save it back to memory.
19:30:25 yes i thought about that
19:30:35 but there's always the risk of invading someone elses privacy
19:30:44 The other solution is to just say, "Know what? One byte = one stack cell = 24 bits, so 8-bit bytes waste a lot of space. Use Unicode instead. :D)
19:30:45 (reading where you're not supposed to)
19:31:22 Well, byte-addressed CPUs have the same problems.
19:31:30 heh nah its no problem really. one cell is 3 bytes for me anyways. in fact i have to do some nasty tricks to just save or load a 24bit number :\
19:31:52 i might just cheat c@ and c!
19:32:25 then again, i wont have restricted memmory as such so it cant really become a problem for me
19:33:12 ahwell screw it i'm going to get some sleep
19:33:19 been squinting my eyes for hours now :p
19:33:23 nite
19:33:41 --- quit: qFox ("if at first you dont succeed, quit again")
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19:35:18 Screw it all -- I'm ordering pizza.
19:35:31 And I'm going to tune around on the ham radio a bit. afk for a few.
19:35:38 Hello, everyone. :)
19:36:02 Greetings.
19:36:25 Hello kc5tja. :)
19:37:48 I know! I'll make the ham radio control software I've been meaning to make, using GForth for the time being.
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19:56:04 * kc5tja sighs -- maybe I won't. The gender benders I *know* I have are suddenly no longer accounted for.
19:57:55 kc5tja, what do you think of gforth?
19:58:08 Ah ha! Found one!
19:58:30 fridge_: I think it's a nice system to learn Forth on, and I think it's a reasonable system to do reasonable Forth hacking with.
19:58:33 But it's no power-house.
19:58:55 It's fat and bloated for most things.
19:59:11 Overall, I give it a "B-" grade. Definitely passing, but not my "style."
19:59:36 it runs in a linux environment
19:59:48 fat and bloated is the name of the game there
20:00:27 Crap -- not the right kind of gender bender: it's male/male, and I need female/female.
20:02:50 fat and bloated is the name of the game for just about anykind of system coded in C and other imperative languages. sad to say but those languages don't really impell programmer to find the simplest solutions
20:03:22 this is a semi-new conclusion for me btw
20:03:41 a few months ago i realized that both windows and linux were bloated because of C, not just because of the programmers/people involved
20:03:58 Well, they're bloated largely because of commercial pressure too.
20:04:15 When you need to bang out code to meet a deadline, quality falls by the way-side, immediately.
20:04:46 thin: Can you tell me why peripherals designed to use RS-232 have *MALE* RS-232 ports????
20:05:04 Knowing full-well that the RS-232 port on the PC is itself also male?
20:05:32 they're just kinky
20:05:37 hmm must be cheaper to use male ports.. maybe the wire is normally female/female ?
20:06:01 Well this just sucks ass then.
20:06:14 I know for a fact I have a female/female gender bender, but I can't find it *anywhere*.
20:06:40 ya could always rip apart a cable and change the wiring :P
20:07:51 No, I couldn't.
20:07:56 Because I still need the female connectors.
20:09:17 I know I have this stupid thing too, because I distinctly remember seeing it, touching it, and putting it away after I'd move in here.
20:10:21 *gasp* you touched a female connector ;)
20:13:02 blahblah
20:13:22 you're bound to find it if you clean up your entire house :D
20:14:45 thin: thats not how it works
20:14:55 he will find it only after he has gone and purchased another
20:15:04 its how these things work
20:15:08 --- nick: fridge_ -> fridge
20:15:32 --- part: fridge left #forth
20:15:33 --- join: yeoh_yeoh (~yeoh@219.95.14.2) joined #forth
20:15:41 sure, IF you don't clean up the whole house
20:15:45 --- join: fridge (~fridge@dsl-203-113-230-141.NSW.netspace.net.au) joined #forth
20:15:52 sure, IF you don't clean up the whole house
20:15:55 --- quit: yeoh (Read error: 60 (Operation timed out))
20:16:07 --- part: yeoh_yeoh left #forth
20:16:08 AND move all furniture around
20:18:04 Wow.
20:18:12 I was going to tip him too, and he just RAN right off without it!!
20:18:15 Oh well, more cash for moi.
20:20:42 c'est vrai
20:21:47 ??
20:26:00 --- join: yeoh (~yeoh@219.95.236.128) joined #forth
20:26:27 --- quit: thin ("..")
21:46:41 kc5tja. H is not only Na analogue, it's also Cl analogue.
21:47:03 That's why you can have ionic Na^+H^-
21:47:29 Or NaH.
21:53:21 Ah, that makes sense.
22:08:32 This's called potassium hydride.
22:11:20 Sodium; Na is sodium. :)
22:11:44 Well.
22:11:53 But, yes, I am familiar with that method of chemical nomenclature.
22:11:55 It's called "natrijj" here.
22:12:09 * kc5tja is taking Chemistry in college.
22:12:48 Hydrides are studied here too.
22:13:32 We are not studying hydrides per se; rather, the reactivity of various metals (Alkali, Alkaline, and transition metals).
22:13:41 Zyrconium-nickel alloys dissolve hydrogen very well.
22:14:45 Zr-Ni-H trinary system.
22:15:05 But I'm not in that research group.
22:15:33 hi
22:15:38 terve asau
22:16:06 Question is, how easy/efficient is it to extract the hydrogen again, and are the waste products recyclable, like NaOH is?
22:16:12 Dobre jitro, mur!
22:16:30 asau are you jitro?
22:16:36 utro?
22:16:45 That's Czeck.
22:16:54 Dobroe utro!
22:17:15 chezky!
22:17:17 hrmmm
22:17:22 can't remember correctly
22:17:27 czeesky?
22:17:30 Cestina
22:17:54 cestina?
22:19:27 i mean czeck language
22:28:14 Ah.
22:28:20 Cheshskijj.
22:29:39 nje po-russkij
22:30:28 Cestina (CZ) = cheshskijj (RU).
22:30:53 Cheshskijj jazyk.
22:31:03 Cheshskoe pivo.
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22:32:41 doodz
22:32:51 Dobre jitro!
22:37:58 --- quit: LOOPHOG ()
23:25:16 --- join: jewel (~jewel@pta-dial-196-31-185-152.mweb.co.za) joined #forth
23:50:51 --- quit: kc5tja ("THX QSO ES 73 DE KC5TJA/6 CL ES QRT AR SK")
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